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llvm.7809
backport-llvm-r204452
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File backport-llvm-r204452 of Package llvm.7809
------------------------------------------------------------------------ r204452 | rsandifo | 2014-03-21 12:04:54 +0100 (Fri, 21 Mar 2014) | 7 lines [SystemZ] Use "let Predicates =" for blocks of new instructions ...instead of a separate Requires for each one. This style was already used in some places and seems more compact. No behavioral change intended. ------------------------------------------------------------------------ Index: lib/Target/SystemZ/SystemZInstrInfo.td =================================================================== --- lib/Target/SystemZ/SystemZInstrInfo.td.orig +++ lib/Target/SystemZ/SystemZInstrInfo.td @@ -1049,15 +1049,15 @@ let Defs = [CC] in { // Forms of RISBG that only affect one word of the destination register. // They do not set CC. -def RISBMux : RotateSelectRIEfPseudo<GRX32, GRX32>, Requires<[FeatureHighWord]>; -def RISBLL : RotateSelectAliasRIEf<GR32, GR32>, Requires<[FeatureHighWord]>; -def RISBLH : RotateSelectAliasRIEf<GR32, GRH32>, Requires<[FeatureHighWord]>; -def RISBHL : RotateSelectAliasRIEf<GRH32, GR32>, Requires<[FeatureHighWord]>; -def RISBHH : RotateSelectAliasRIEf<GRH32, GRH32>, Requires<[FeatureHighWord]>; -def RISBLG : RotateSelectRIEf<"risblg", 0xEC51, GR32, GR64>, - Requires<[FeatureHighWord]>; -def RISBHG : RotateSelectRIEf<"risbhg", 0xEC5D, GRH32, GR64>, - Requires<[FeatureHighWord]>; +let Predicates = [FeatureHighWord] in { + def RISBMux : RotateSelectRIEfPseudo<GRX32, GRX32>; + def RISBLL : RotateSelectAliasRIEf<GR32, GR32>; + def RISBLH : RotateSelectAliasRIEf<GR32, GRH32>; + def RISBHL : RotateSelectAliasRIEf<GRH32, GR32>; + def RISBHH : RotateSelectAliasRIEf<GRH32, GRH32>; + def RISBLG : RotateSelectRIEf<"risblg", 0xEC51, GR32, GR64>; + def RISBHG : RotateSelectRIEf<"risbhg", 0xEC5D, GRH32, GR64>; +} // Rotate second operand left and perform a logical operation with selected // bits of the first operand. The CC result only describes the selected bits, Index: lib/Target/SystemZ/SystemZInstrFP.td =================================================================== --- lib/Target/SystemZ/SystemZInstrFP.td.orig +++ lib/Target/SystemZ/SystemZInstrFP.td @@ -258,15 +258,6 @@ def FIEBR : UnaryRRF<"fieb", 0xB357, FP3 def FIDBR : UnaryRRF<"fidb", 0xB35F, FP64, FP64>; def FIXBR : UnaryRRF<"fixb", 0xB347, FP128, FP128>; -// Extended forms of the previous three instructions. M4 can be set to 4 -// to suppress detection of inexact conditions. -def FIEBRA : UnaryRRF4<"fiebra", 0xB357, FP32, FP32>, - Requires<[FeatureFPExtension]>; -def FIDBRA : UnaryRRF4<"fidbra", 0xB35F, FP64, FP64>, - Requires<[FeatureFPExtension]>; -def FIXBRA : UnaryRRF4<"fixbra", 0xB347, FP128, FP128>, - Requires<[FeatureFPExtension]>; - // frint rounds according to the current mode (modifier 0) and detects // inexact conditions. def : Pat<(frint FP32:$src), (FIEBR 0, FP32:$src)>; @@ -274,6 +265,12 @@ def : Pat<(frint FP64:$src), (FIDBR 0, def : Pat<(frint FP128:$src), (FIXBR 0, FP128:$src)>; let Predicates = [FeatureFPExtension] in { + // Extended forms of the FIxBR instructions. M4 can be set to 4 + // to suppress detection of inexact conditions. + def FIEBRA : UnaryRRF4<"fiebra", 0xB357, FP32, FP32>; + def FIDBRA : UnaryRRF4<"fidbra", 0xB35F, FP64, FP64>; + def FIXBRA : UnaryRRF4<"fixbra", 0xB347, FP128, FP128>; + // fnearbyint is like frint but does not detect inexact conditions. def : Pat<(fnearbyint FP32:$src), (FIEBRA 0, FP32:$src, 4)>; def : Pat<(fnearbyint FP64:$src), (FIDBRA 0, FP64:$src, 4)>;
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