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SUSE:SLE-12-SP2:GA
qemu-linux-user.7444
0289-x86-add-infrastructure-for-7_0_EDX-.patch
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File 0289-x86-add-infrastructure-for-7_0_EDX-.patch of Package qemu-linux-user.7444
From 845104e75f882d7fea9adbe73044ac18803cece6 Mon Sep 17 00:00:00 2001 From: Luwei Kang <luwei.kang@intel.com> Date: Mon, 31 Oct 2016 16:27:26 +0800 Subject: [PATCH] x86: add infrastructure for 7_0_EDX features The spec can be found in Intel Software Developer Manual or in Instruction Set Extensions Programming Reference. Signed-off-by: Piotr Luc <piotr.luc@intel.com> Signed-off-by: Luwei Kang <luwei.kang@intel.com> Message-Id: <1477902446-5932-1-git-send-email-he.chen@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> (cherry picked from commit 95ea69fb46266aaa46d0c8b7f0ba8c4903dbe4e3) [BR: BSC#1068032 CVE-2017-5715 - orig patch modified to not provide new feature, just infrastructure, and change to match current code's feat_name type] Signed-off-by: Bruce Rogers <brogers@suse.com> --- target-i386/cpu.c | 21 ++++++++++++++++++++- target-i386/cpu.h | 1 + 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index c0b8e436b8..cd3b6726e6 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -262,6 +262,17 @@ static const char *cpuid_7_0_ebx_feature_name[] = { NULL, NULL, "avx512pf", "avx512er", "avx512cd", NULL, NULL, NULL, }; +static const char *cpuid_7_0_edx_feature_name[] = { + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, +}; + static const char *cpuid_apm_edx_feature_name[] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, @@ -338,6 +349,7 @@ static const char *cpuid_xsave_feature_name[] = { CPUID_7_0_EBX_FSGSBASE, CPUID_7_0_EBX_HLE, CPUID_7_0_EBX_AVX2, CPUID_7_0_EBX_ERMS, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM, CPUID_7_0_EBX_RDSEED */ +#define TCG_7_0_EDX_FEATURES 0 #define TCG_APM_FEATURES 0 @@ -394,6 +406,13 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { .cpuid_reg = R_EBX, .tcg_features = TCG_7_0_EBX_FEATURES, }, + [FEAT_7_0_EDX] = { + .feat_names = cpuid_7_0_edx_feature_name, + .cpuid_eax = 7, + .cpuid_needs_ecx = true, .cpuid_ecx = 0, + .cpuid_reg = R_EDX, + .tcg_features = TCG_7_0_EDX_FEATURES, + }, [FEAT_8000_0007_EDX] = { .feat_names = cpuid_apm_edx_feature_name, .cpuid_eax = 0x80000007, @@ -2408,7 +2427,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, *eax = 0; /* Maximum ECX value for sub-leaves */ *ebx = env->features[FEAT_7_0_EBX]; /* Feature flags */ *ecx = 0; /* Reserved */ - *edx = 0; /* Reserved */ + *edx = env->features[FEAT_7_0_EDX]; /* Feature flags */ } else { *eax = 0; *ebx = 0; diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 9e66db1474..99981d98b0 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -406,6 +406,7 @@ typedef enum FeatureWord { FEAT_1_EDX, /* CPUID[1].EDX */ FEAT_1_ECX, /* CPUID[1].ECX */ FEAT_7_0_EBX, /* CPUID[EAX=7,ECX=0].EBX */ + FEAT_7_0_EDX, /* CPUID[EAX=7,ECX=0].EDX */ FEAT_8000_0001_EDX, /* CPUID[8000_0001].EDX */ FEAT_8000_0001_ECX, /* CPUID[8000_0001].ECX */ FEAT_8000_0007_EDX, /* CPUID[8000_0007].EDX */
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