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SUSE:SLE-12-SP2:GA
qemu.12301
0313-target-i386-define-md-clear-bit.patch
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File 0313-target-i386-define-md-clear-bit.patch of Package qemu.12301
From 37d50810880df6bd59c9d725a00e072e16528ee9 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini <pbonzini@redhat.com> Date: Fri, 1 Mar 2019 21:40:52 +0100 Subject: [PATCH] target/i386: define md-clear bit md-clear is a new CPUID bit which is set when microcode provides the mechanism to invoke a flush of various exploitable CPU buffers by invoking the VERW instruction. Add the new feature. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [BR: BSC#1111331 CVE-2018-12126 CVE-2018-12127 CVE-2018-12130 CVE-2019-11091] Signed-off-by: Bruce Rogers <brogers@suse.com> --- target-i386/cpu.c | 2 +- target-i386/cpu.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index b8db08f6bf..17d2a7e4a6 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -265,7 +265,7 @@ static const char *cpuid_7_0_ebx_feature_name[] = { static const char *cpuid_7_0_edx_feature_name[] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, + NULL, NULL, "md-clear", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 33050a00d3..69131a414e 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -576,6 +576,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_7_0_EBX_AVX512ER (1U << 27) /* AVX-512 Exponential and Reciprocal */ #define CPUID_7_0_EBX_AVX512CD (1U << 28) /* AVX-512 Conflict Detection */ +#define CPUID_7_0_EDX_MD_CLEAR (1U << 10) /* Microarchitectural Data Clear */ #define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */ #define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypass Disable */
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