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SUSE:SLE-15-SP2:Update
xen
xsa435-0-40.patch
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File xsa435-0-40.patch of Package xen
From 8f6bc7f9b72eb7cf0c8c5ae5d80498a58ba0b7c3 Mon Sep 17 00:00:00 2001 From: Andrew Cooper <andrew.cooper3@citrix.com> Date: Mon, 15 May 2023 16:59:25 +0100 Subject: x86/vtx: Remove opencoded MSR_ARCH_CAPS check MSR_ARCH_CAPS data is now included in featureset information. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2383,8 +2383,6 @@ static void __init ler_to_fixup_check(vo */ static bool __init has_if_pschange_mc(void) { - uint64_t caps = 0; - /* * If we are virtualised, there is nothing we can do. Our EPT tables are * shadowed by our hypervisor, and not walked by hardware. @@ -2392,10 +2390,8 @@ static bool __init has_if_pschange_mc(vo if ( cpu_has_hypervisor ) return false; - if ( boot_cpu_has(X86_FEATURE_ARCH_CAPS) ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); - - if ( caps & ARCH_CAPS_IF_PSCHANGE_MC_NO ) + /* Hardware reports itself as fixed. */ + if ( cpu_has_if_pschange_mc_no ) return false; /* --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -136,6 +136,9 @@ #define cpu_has_tsx_force_abort boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT) #define cpu_has_arch_caps boot_cpu_has(X86_FEATURE_ARCH_CAPS) +/* MSR_ARCH_CAPS */ +#define cpu_has_if_pschange_mc_no boot_cpu_has(X86_FEATURE_IF_PSCHANGE_MC_NO) + /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) #define cpu_has_cpuid_faulting boot_cpu_has(X86_FEATURE_CPUID_FAULTING)
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