Icarus Verilog
Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
- Devel package for openSUSE:Factory
- Links to openSUSE:Factory / iverilog
- Download package
-
Checkout Package
osc -A https://api.opensuse.org checkout electronics/iverilog && cd $_
- Create Badge
Refresh
Refresh
Source Files (show merged sources derived from linked package)
Filename | Size | Changed |
---|---|---|
_link | 0000000124 124 Bytes | |
iverilog.changes | 0000004900 4.79 KB | |
iverilog.spec | 0000002189 2.14 KB | |
verilog-12.0.tar.gz | 0003334697 3.18 MB |
Latest Revision
buildservice-autocommit
accepted
request 1146378
from
Stanislav Brabec (sbrabec)
(revision 9)
baserev update by copy to link target
Comments 0