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SUSE:SLE-12-SP1:GA
cross-armv6hl-gcc48-icecream-backend.149
gcc48-bnc887141.patch
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File gcc48-bnc887141.patch of Package cross-armv6hl-gcc48-icecream-backend.149
2014-07-16 Richard Biener <rguenther@suse.de> PR rtl-optimization/61801 * sched-deps.c (sched_analyze_2): For ASM_OPERANDS and ASM_INPUT don't set reg_pending_barrier if it appears in a debug-insn. Index: gcc/sched-deps.c =================================================================== --- gcc/sched-deps.c (revision 212580) +++ gcc/sched-deps.c (working copy) @@ -2750,7 +2750,8 @@ sched_analyze_2 (struct deps_desc *deps, Consider for instance a volatile asm that changes the fpu rounding mode. An insn should not be moved across this even if it only uses pseudo-regs because it might give an incorrectly rounded result. */ - if (code != ASM_OPERANDS || MEM_VOLATILE_P (x)) + if ((code != ASM_OPERANDS || MEM_VOLATILE_P (x)) + && !DEBUG_INSN_P (insn)) reg_pending_barrier = TRUE_BARRIER; /* For all ASM_OPERANDS, we must traverse the vector of input operands.
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