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SUSE:SLE-12-SP1:GA
pciutils
pciutils-lspci-Correct-Root-Capabilities-CRS-So...
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File pciutils-lspci-Correct-Root-Capabilities-CRS-Software-Visibil.patch of Package pciutils
From 1cefd379194e1b5ab81c33905357b6ac8ed69b76 Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas <bhelgaas@google.com> Date: Mon, 1 Sep 2014 22:03:46 -0600 Subject: [PATCH] lspci: Correct Root Capabilities "CRS Software Visibility" bit lspci incorrectly tests bit 4, not bit 0, for "CRS Software Visibility" in the Root Capabilities register, so it shows "RootCap: CRSVisible-" even for devices that do support Software Visibility. Use the correct definition for PCI_EXP_RTCAP_CRSVIS. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Lee, Chun-Yi <jlee@suse.com> --- lib/header.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: pciutils-3.2.1/lib/header.h =================================================================== --- pciutils-3.2.1.orig/lib/header.h +++ pciutils-3.2.1/lib/header.h @@ -841,7 +841,7 @@ #define PCI_EXP_RTCTL_PMEIE 0x0008 /* PME Interrupt Enable */ #define PCI_EXP_RTCTL_CRSVIS 0x0010 /* Configuration Request Retry Status Visible to SW */ #define PCI_EXP_RTCAP 0x1e /* Root Capabilities */ -#define PCI_EXP_RTCAP_CRSVIS 0x0010 /* Configuration Request Retry Status Visible to SW */ +#define PCI_EXP_RTCAP_CRSVIS 0x0001 /* Configuration Request Retry Status Visible to SW */ #define PCI_EXP_RTSTA 0x20 /* Root Status */ #define PCI_EXP_RTSTA_PME_REQID 0x0000ffff /* PME Requester ID */ #define PCI_EXP_RTSTA_PME_STATUS 0x00010000 /* PME Status */
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