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SUSE:SLE-12-SP1:GA
xen.10697
5a4fd894-4-clarifications-to-wait-infrastructur...
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File 5a4fd894-4-clarifications-to-wait-infrastructure.patch of Package xen.10697
# Commit 2d1c82261d966735e82e5971eddb63ba3c565a37 # Date 2018-01-05 19:57:08 +0000 # Author Andrew Cooper <andrew.cooper3@citrix.com> # Committer Andrew Cooper <andrew.cooper3@citrix.com> common/wait: Clarifications to wait infrastructure This logic is not as clear as it could be. Add some comments to help. Rearrange the asm block in __prepare_to_wait() to separate the GPR saving/restoring from the internal logic. While tweaking, add an unreachable() following the jmp in check_wakeup_from_wait(). No functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> --- a/xen/common/wait.c +++ b/xen/common/wait.c @@ -140,14 +140,26 @@ static void __prepare_to_wait(struct wai domain_crash_synchronous(); } + /* Hand-rolled setjmp(). */ asm volatile ( - "push %%rax; push %%rbx; push %%rdx; " - "push %%rbp; push %%r8; push %%r9; push %%r10; push %%r11; " - "push %%r12; push %%r13; push %%r14; push %%r15; call 1f; " - "1: addq $2f-1b,(%%rsp); sub %%esp,%%ecx; cmp %3,%%ecx; ja 3f; " - "mov %%rsp,%%rsi; 2: rep movsb; mov %%rsp,%%rsi; 3: pop %%rax; " - "pop %%r15; pop %%r14; pop %%r13; pop %%r12; " - "pop %%r11; pop %%r10; pop %%r9; pop %%r8; " + "push %%rax; push %%rbx; push %%rdx; push %%rbp;" + "push %%r8; push %%r9; push %%r10; push %%r11;" + "push %%r12; push %%r13; push %%r14; push %%r15;" + + "call 1f;" + "1: addq $2f-1b,(%%rsp);" + "sub %%esp,%%ecx;" + "cmp %3,%%ecx;" + "ja 3f;" + "mov %%rsp,%%rsi;" + + /* check_wakeup_from_wait() longjmp()'s to this point. */ + "2: rep movsb;" + "mov %%rsp,%%rsi;" + "3: pop %%rax;" + + "pop %%r15; pop %%r14; pop %%r13; pop %%r12;" + "pop %%r11; pop %%r10; pop %%r9; pop %%r8;" "pop %%rbp; pop %%rdx; pop %%rbx; pop %%rax" : "=&S" (wqv->esp), "=&c" (dummy), "=&D" (dummy) : "i" (PAGE_SIZE), "0" (0), "1" (cpu_info), "2" (wqv->stack) @@ -191,11 +203,16 @@ void check_wakeup_from_wait(void) wait(); /* takes us back into the scheduler */ } + /* + * Hand-rolled longjmp(). Returns to the pointer on the top of + * wqv->stack, and lands on a `rep movs` instruction. + */ asm volatile ( "mov %1,%%"__OP"sp; jmp *(%0)" : : "S" (wqv->stack), "D" (wqv->esp), "c" ((char *)get_cpu_info() - (char *)wqv->esp) : "memory" ); + unreachable(); } #else /* !CONFIG_X86 */
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