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SUSE:SLE-12-SP1:GA
xen.10697
5bb60c4f-x86-split-opt_pv_l1tf.patch
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File 5bb60c4f-x86-split-opt_pv_l1tf.patch of Package xen.10697
References: bsc#1105528 # Commit 0b89643ef6ef14e2c2b731ca675d23e405ed69b1 # Date 2018-10-04 14:49:19 +0200 # Author Jan Beulich <jbeulich@suse.com> # Committer Jan Beulich <jbeulich@suse.com> x86: split opt_pv_l1tf Use separate tracking variables for the hardware domain and DomU-s. No functional change intended, but adjust the comment in init_speculation_mitigations() to match prior as well as resulting code. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com> --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -107,8 +107,10 @@ static int __init parse_spec_ctrl(char * if ( opt_smt < 0 ) opt_smt = 1; - if ( opt_pv_l1tf < 0 ) - opt_pv_l1tf = 0; + if ( opt_pv_l1tf_hwdom < 0 ) + opt_pv_l1tf_hwdom = 0; + if ( opt_pv_l1tf_domu < 0 ) + opt_pv_l1tf_domu = 0; disable_common: opt_rsb_pv = 0; @@ -172,7 +174,8 @@ static int __init parse_spec_ctrl(char * } custom_param("spec-ctrl", parse_spec_ctrl); -int8_t __read_mostly opt_pv_l1tf = -1; +int8_t __read_mostly opt_pv_l1tf_hwdom = -1; +int8_t __read_mostly opt_pv_l1tf_domu = -1; static __init int parse_pv_l1tf(char *s) { @@ -180,12 +183,14 @@ static __init int parse_pv_l1tf(char *s) int val, rc = 0; /* Inhibit the defaults as an explicit choice has been given. */ - if ( opt_pv_l1tf == -1 ) - opt_pv_l1tf = 0; + if ( opt_pv_l1tf_hwdom == -1 ) + opt_pv_l1tf_hwdom = 0; + if ( opt_pv_l1tf_domu == -1 ) + opt_pv_l1tf_domu = 0; /* Interpret 'pv-l1tf' alone in its positive boolean form. */ if ( *s == '\0' ) - opt_pv_l1tf = OPT_PV_L1TF_DOM0 | OPT_PV_L1TF_DOMU; + opt_pv_l1tf_hwdom = opt_pv_l1tf_domu = 1; do { ss = strchr(s, ','); @@ -195,20 +200,18 @@ static __init int parse_pv_l1tf(char *s) switch ( parse_bool(s) ) { case 0: - opt_pv_l1tf = 0; + opt_pv_l1tf_hwdom = opt_pv_l1tf_domu = 0; break; case 1: - opt_pv_l1tf = OPT_PV_L1TF_DOM0 | OPT_PV_L1TF_DOMU; + opt_pv_l1tf_hwdom = opt_pv_l1tf_domu = 1; break; default: if ( (val = parse_boolean("dom0", s, ss)) >= 0 ) - opt_pv_l1tf = ((opt_pv_l1tf & ~OPT_PV_L1TF_DOM0) | - (val ? OPT_PV_L1TF_DOM0 : 0)); + opt_pv_l1tf_hwdom = val; else if ( (val = parse_boolean("domu", s, ss)) >= 0 ) - opt_pv_l1tf = ((opt_pv_l1tf & ~OPT_PV_L1TF_DOMU) | - (val ? OPT_PV_L1TF_DOMU : 0)); + opt_pv_l1tf_domu = val; else rc = -EINVAL; break; @@ -264,7 +267,7 @@ static void __init print_details(enum in opt_l1d_flush ? " L1D_FLUSH" : ""); /* L1TF diagnostics, printed if vulnerable or PV shadowing is in use. */ - if ( cpu_has_bug_l1tf || opt_pv_l1tf ) + if ( cpu_has_bug_l1tf || opt_pv_l1tf_hwdom || opt_pv_l1tf_domu ) printk(" L1TF: believed%s vulnerable, maxphysaddr L1D %u, CPUID %u" ", Safe address %"PRIx64"\n", cpu_has_bug_l1tf ? "" : " not", @@ -287,8 +290,8 @@ static void __init print_details(enum in opt_xpti_domu ? "enabled" : "disabled"); printk(" PV L1TF shadowing: Dom0 %s, DomU %s\n", - opt_pv_l1tf & OPT_PV_L1TF_DOM0 ? "enabled" : "disabled", - opt_pv_l1tf & OPT_PV_L1TF_DOMU ? "enabled" : "disabled"); + opt_pv_l1tf_hwdom ? "enabled" : "disabled", + opt_pv_l1tf_domu ? "enabled" : "disabled"); } int8_t __read_mostly opt_xpti_hwdom = -1; @@ -668,13 +671,10 @@ void __init init_speculation_mitigations * By default, enable PV domU L1TF mitigations on all L1TF-vulnerable * hardware. */ - if ( opt_pv_l1tf == -1 ) - { - if ( !cpu_has_bug_l1tf ) - opt_pv_l1tf = 0; - else - opt_pv_l1tf = OPT_PV_L1TF_DOMU; - } + if ( opt_pv_l1tf_hwdom == -1 ) + opt_pv_l1tf_hwdom = 0; + if ( opt_pv_l1tf_domu == -1 ) + opt_pv_l1tf_domu = cpu_has_bug_l1tf; /* * By default, enable L1D_FLUSH on L1TF-vulnerable hardware, unless --- a/xen/include/asm-x86/shadow.h +++ b/xen/include/asm-x86/shadow.h @@ -210,8 +210,8 @@ void pv_l1tf_tasklet(unsigned long data) static inline void pv_l1tf_domain_init(struct domain *d) { d->arch.pv_domain.check_l1tf = - opt_pv_l1tf & (d->domain_id == 0 /* ->is_privileged not usable yet */ - ? OPT_PV_L1TF_DOM0 : OPT_PV_L1TF_DOMU); + d->domain_id == 0 /* ->is_privileged not usable yet */ + ? opt_pv_l1tf_hwdom : opt_pv_l1tf_domu; tasklet_init(&d->arch.paging.shadow.pv_l1tf_tasklet, pv_l1tf_tasklet, (unsigned long)d); --- a/xen/include/asm-x86/spec_ctrl.h +++ b/xen/include/asm-x86/spec_ctrl.h @@ -37,9 +37,7 @@ extern uint8_t default_xen_rsb; extern int8_t opt_xpti_hwdom, opt_xpti_domu; -extern int8_t opt_pv_l1tf; -#define OPT_PV_L1TF_DOM0 0x01 -#define OPT_PV_L1TF_DOMU 0x02 +extern int8_t opt_pv_l1tf_hwdom, opt_pv_l1tf_domu; /* * The L1D address mask, which might be wider than reported in CPUID, and the
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