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SUSE:SLE-12-SP1:GA
xen.481
541ad81a-VT-d-suppress-UR-signaling-for-further...
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File 541ad81a-VT-d-suppress-UR-signaling-for-further-desktop-chipsets.patch of Package xen.481
References: bnc#826717 CVE-2013-3495 XSA-59 # Commit 3e2331d271cc0882e4013c8f20398c46c35f90a1 # Date 2014-09-18 15:03:22 +0200 # Author Jan Beulich <jbeulich@suse.com> # Committer Jan Beulich <jbeulich@suse.com> VT-d: suppress UR signaling for further desktop chipsets This extends commit d6cb14b34f ("VT-d: suppress UR signaling for desktop chipsets") as per the finally obtained list of affected chipsets from Intel. Also pad the IDs we had listed there before to full 4 hex digits. This is CVE-2013-3495 / XSA-59. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Yang Zhang <yang.z.zhang@intel.com> --- a/xen/drivers/passthrough/vtd/quirks.c +++ b/xen/drivers/passthrough/vtd/quirks.c @@ -474,10 +474,12 @@ void pci_vtd_quirk(const struct pci_dev action, seg, bus, dev, func); break; - case 0x100: case 0x104: case 0x108: /* Sandybridge */ - case 0x150: case 0x154: case 0x158: /* Ivybridge */ - case 0xa04: /* Haswell ULT */ - case 0xc00: case 0xc04: case 0xc08: /* Haswell */ + case 0x0040: case 0x0044: case 0x0048: /* Nehalem/Westmere */ + case 0x0100: case 0x0104: case 0x0108: /* Sandybridge */ + case 0x0150: case 0x0154: case 0x0158: /* Ivybridge */ + case 0x0a04: /* Haswell ULT */ + case 0x0c00: case 0x0c04: case 0x0c08: /* Haswell */ + case 0x1600: case 0x1604: case 0x1608: /* Broadwell */ bar = pci_conf_read32(seg, bus, dev, func, 0x6c); bar = (bar << 32) | pci_conf_read32(seg, bus, dev, func, 0x68); pa = bar & 0x7ffffff000UL; /* bits 12...38 */
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