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No build reason found for pool-leap-15.6:aarch64
SUSE:SLE-12-SP1:Update
qemu.5922
0038-increase-x86_64-physical-bits-to-42.patch
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File 0038-increase-x86_64-physical-bits-to-42.patch of Package qemu.5922
From c923a7775cd2844bdfe2fd95eaa32542aa52312d Mon Sep 17 00:00:00 2001 From: Bruce Rogers <brogers@suse.com> Date: Fri, 17 May 2013 16:49:58 -0600 Subject: [PATCH] increase x86_64 physical bits to 42 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allow for guests with higher amounts of ram. The current thought is that 2TB specified on qemu commandline would be an appropriate limit. Note that this requires the next higher bit value since the highest address is actually more than 2TB due to the pci memory hole. Signed-off-by: Bruce Rogers <brogers@suse.com> Signed-off-by: Andreas Färber <afaerber@suse.de> --- target-i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 03b33cf3bd..252b512cc2 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2564,7 +2564,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) { /* 64 bit processor */ /* XXX: The physical address space is limited to 42 bits in exec.c. */ - *eax = 0x00003028; /* 48 bits virtual, 40 bits physical */ + *eax = 0x0000302A; /* 48 bits virtual, 42 bits physical */ } else { if (env->features[FEAT_1_EDX] & CPUID_PSE36) { *eax = 0x00000024; /* 36 bits physical */
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