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SUSE:SLE-12-SP2:GA
qemu.611
0126-target-ppc-enable-virtio-endian-amb.patch
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File 0126-target-ppc-enable-virtio-endian-amb.patch of Package qemu.611
From 156da420bb5e790fcf589374988f07c35f7ab4b9 Mon Sep 17 00:00:00 2001 From: Greg Kurz <gkurz@linux.vnet.ibm.com> Date: Tue, 24 Jun 2014 19:51:19 +0200 Subject: [PATCH] target-ppc: enable virtio endian ambivalent support The device endianness is the cpu endianness at device reset time. Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> (cherry picked from commit 7826c2b2a46988c278fbea5e1e376cf783f8bc46) Signed-off-by: Alexander Graf <agraf@suse.de> --- target-ppc/cpu.h | 2 ++ target-ppc/translate_init.c | 15 +++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index b8af711..d447318 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -29,6 +29,8 @@ #define TARGET_LONG_BITS 64 #define TARGET_PAGE_BITS 12 +#define TARGET_IS_BIENDIAN 1 + /* Note that the official physical address space bits is 62-M where M is implementation dependent. I've not looked up M for the set of cpus we emulate at the system level. */ diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 2b95fe7..86ce3d3 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8638,6 +8638,18 @@ static void ppc_cpu_reset(CPUState *s) tlb_flush(s, 1); } +#ifndef CONFIG_USER_ONLY +static bool ppc_cpu_is_big_endian(CPUState *cs) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + + cpu_synchronize_state(cs); + + return !msr_le; +} +#endif + static void ppc_cpu_initfn(Object *obj) { CPUState *cs = CPU(obj); @@ -8726,6 +8738,9 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) #else cc->gdb_core_xml_file = "power-core.xml"; #endif +#ifndef CONFIG_USER_ONLY + cc->virtio_is_big_endian = ppc_cpu_is_big_endian; +#endif dc->fw_name = "PowerPC,UNKNOWN"; }
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