File 0009-Revert-armv8-Enable-CPUECTLR.SMPEN-.patch of Package u-boot-odroid-c2

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File 0009-Revert-armv8-Enable-CPUECTLR.SMPEN-.patch of Package u-boot-odroid-c2

From 607baf77917bf079758ec6d60abf283cc701638c Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Thu, 14 Jul 2016 17:36:18 -0400
Subject: [PATCH] Revert "armv8: Enable CPUECTLR.SMPEN for coherency"
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Upon further review this breaks most other platforms as we need to check
what core we're running on before touching it at all.

This reverts commit d73718f3236c520a92efa401084c658e6cc067f3.

Signed-off-by: Tom Rini <trini@konsulko.com>
(cherry picked from commit 3a592a1349ac3961b0f4f2db0a8d9f128225d897)
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 arch/arm/cpu/armv8/start.S | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index dfce469..670e323 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -81,14 +81,6 @@ reset:
 	msr	cpacr_el1, x0			/* Enable FP/SIMD */
 0:
 
-	/* Enalbe SMPEN bit for coherency.
-	 * This register is not architectural but at the moment
-	 * this bit should be set for A53/A57/A72.
-	 */
-	mrs     x0, S3_1_c15_c2_1               /* cpuactlr_el1 */
-	orr     x0, x0, #0x40
-	msr     S3_1_c15_c2_1, x0
-
 	/* Apply ARM core specific erratas */
 	bl	apply_core_errata

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File 0009-Revert-armv8-Enable-CPUECTLR.SMPEN-.patch of Package u-boot-odroid-c2

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