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SUSE:SLE-12-SP2:Update
xen.7652
5afc13ae-7-x86-split-X86_FEATURE_SC_MSR.patch
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File 5afc13ae-7-x86-split-X86_FEATURE_SC_MSR.patch of Package xen.7652
# Commit fa9eb09d446a1279f5e861e6b84fa8675dabf148 # Date 2018-05-16 12:19:10 +0100 # Author Andrew Cooper <andrew.cooper3@citrix.com> # Committer Andrew Cooper <andrew.cooper3@citrix.com> x86/spec_ctrl: Split X86_FEATURE_SC_MSR into PV and HVM variants In order to separately control whether MSR_SPEC_CTRL is virtualised for PV and HVM guests, split the feature used to control runtime alternatives into two. Xen will use MSR_SPEC_CTRL itself if either of these features are active. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Wei Liu <wei.liu2@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> --- sle12sp2.orig/xen/arch/x86/cpu/common.c 2018-05-23 11:13:56.000000000 +0200 +++ sle12sp2/xen/arch/x86/cpu/common.c 2018-05-23 11:16:00.000000000 +0200 @@ -417,9 +417,12 @@ void identify_cpu(struct cpuinfo_x86 *c) if (test_bit(X86_FEATURE_IND_THUNK_JMP, boot_cpu_data.x86_capability)) __set_bit(X86_FEATURE_IND_THUNK_JMP, c->x86_capability); - if (test_bit(X86_FEATURE_SC_MSR, + if (test_bit(X86_FEATURE_SC_MSR_PV, boot_cpu_data.x86_capability)) - __set_bit(X86_FEATURE_SC_MSR, c->x86_capability); + __set_bit(X86_FEATURE_SC_MSR_PV, c->x86_capability); + if (test_bit(X86_FEATURE_SC_MSR_HVM, + boot_cpu_data.x86_capability)) + __set_bit(X86_FEATURE_SC_MSR_HVM, c->x86_capability); if (test_bit(X86_FEATURE_SC_RSB_PV, boot_cpu_data.x86_capability)) __set_bit(X86_FEATURE_SC_RSB_PV, c->x86_capability); --- sle12sp2.orig/xen/arch/x86/spec_ctrl.c 2018-05-23 11:13:56.000000000 +0200 +++ sle12sp2/xen/arch/x86/spec_ctrl.c 2018-05-23 11:16:00.000000000 +0200 @@ -112,7 +112,8 @@ static void __init print_details(enum in thunk == THUNK_RETPOLINE ? "RETPOLINE" : thunk == THUNK_LFENCE ? "LFENCE" : thunk == THUNK_JMP ? "JMP" : "?", - boot_cpu_has(X86_FEATURE_SC_MSR) ? + (boot_cpu_has(X86_FEATURE_SC_MSR_PV) || + boot_cpu_has(X86_FEATURE_SC_MSR_HVM)) ? default_xen_spec_ctrl & SPEC_CTRL_IBRS ? " IBRS+" : " IBRS-" : "", opt_ibpb ? " IBPB" : "", @@ -286,7 +287,8 @@ void __init init_speculation_mitigations * need the IBRS entry/exit logic to virtualise IBRS support for * guests. */ - __set_bit(X86_FEATURE_SC_MSR, boot_cpu_data.x86_capability); + __set_bit(X86_FEATURE_SC_MSR_PV, boot_cpu_data.x86_capability); + __set_bit(X86_FEATURE_SC_MSR_HVM, boot_cpu_data.x86_capability); if ( ibrs ) default_xen_spec_ctrl |= SPEC_CTRL_IBRS; --- sle12sp2.orig/xen/include/asm-x86/cpufeature.h 2018-05-23 11:13:56.000000000 +0200 +++ sle12sp2/xen/include/asm-x86/cpufeature.h 2018-05-23 11:16:00.000000000 +0200 @@ -21,12 +21,13 @@ XEN_CPUFEATURE(LFENCE_DISPATCH, (FSCAPIN XEN_CPUFEATURE(IND_THUNK_LFENCE, (FSCAPINTS+0)*32+ 11) /* Use IND_THUNK_LFENCE */ XEN_CPUFEATURE(IND_THUNK_JMP, (FSCAPINTS+0)*32+ 12) /* Use IND_THUNK_JMP */ XEN_CPUFEATURE(XEN_IBPB, (FSCAPINTS+0)*32+ 13) /* IBRSB || IBPB */ -XEN_CPUFEATURE(SC_MSR, (FSCAPINTS+0)*32+ 14) /* MSR_SPEC_CTRL used by Xen */ +XEN_CPUFEATURE(SC_MSR_PV, (FSCAPINTS+0)*32+ 14) /* MSR_SPEC_CTRL used by Xen for PV */ +XEN_CPUFEATURE(SC_MSR_HVM, (FSCAPINTS+0)*32+ 15) /* MSR_SPEC_CTRL used by Xen for HVM */ XEN_CPUFEATURE(SC_RSB_PV, (FSCAPINTS+0)*32+ 16) /* RSB overwrite needed for PV */ XEN_CPUFEATURE(SC_RSB_HVM, (FSCAPINTS+0)*32+ 17) /* RSB overwrite needed for HVM */ XEN_CPUFEATURE(MFENCE_RDTSC, (FSCAPINTS+0)*32+ 18) /* MFENCE synchronizes RDTSC */ XEN_CPUFEATURE(NO_XPTI, (FSCAPINTS+0)*32+ 19) /* XPTI mitigation not in use */ -XEN_CPUFEATURE(SC_MSR_IDLE, (FSCAPINTS+0)*32+ 20) /* SC_MSR && default_xen_spec_ctrl */ +XEN_CPUFEATURE(SC_MSR_IDLE, (FSCAPINTS+0)*32+ 20) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */ #define NCAPINTS (FSCAPINTS + 1) /* N 32-bit words worth of info */ --- sle12sp2.orig/xen/include/asm-x86/spec_ctrl_asm.h 2018-05-23 11:11:55.000000000 +0200 +++ sle12sp2/xen/include/asm-x86/spec_ctrl_asm.h 2018-05-23 11:16:00.000000000 +0200 @@ -223,36 +223,36 @@ ALTERNATIVE __stringify(ASM_NOP40), \ DO_OVERWRITE_RSB, X86_FEATURE_SC_RSB_HVM; \ ALTERNATIVE __stringify(ASM_NOP36), \ - DO_SPEC_CTRL_ENTRY_FROM_HVM, X86_FEATURE_SC_MSR + DO_SPEC_CTRL_ENTRY_FROM_HVM, X86_FEATURE_SC_MSR_HVM /* Use after an entry from PV context (syscall/sysenter/int80/int82/etc). */ #define SPEC_CTRL_ENTRY_FROM_PV \ ALTERNATIVE __stringify(ASM_NOP40), \ DO_OVERWRITE_RSB, X86_FEATURE_SC_RSB_PV; \ ALTERNATIVE __stringify(ASM_NOP25), \ - __stringify(DO_SPEC_CTRL_ENTRY maybexen=0), X86_FEATURE_SC_MSR + __stringify(DO_SPEC_CTRL_ENTRY maybexen=0), X86_FEATURE_SC_MSR_PV /* Use in interrupt/exception context. May interrupt Xen or PV context. */ #define SPEC_CTRL_ENTRY_FROM_INTR \ ALTERNATIVE __stringify(ASM_NOP40), \ DO_OVERWRITE_RSB, X86_FEATURE_SC_RSB_PV; \ ALTERNATIVE __stringify(ASM_NOP33), \ - __stringify(DO_SPEC_CTRL_ENTRY maybexen=1), X86_FEATURE_SC_MSR + __stringify(DO_SPEC_CTRL_ENTRY maybexen=1), X86_FEATURE_SC_MSR_PV /* Use when exiting to Xen context. */ #define SPEC_CTRL_EXIT_TO_XEN \ ALTERNATIVE __stringify(ASM_NOP17), \ - DO_SPEC_CTRL_EXIT_TO_XEN, X86_FEATURE_SC_MSR + DO_SPEC_CTRL_EXIT_TO_XEN, X86_FEATURE_SC_MSR_PV /* Use when exiting to PV guest context. */ #define SPEC_CTRL_EXIT_TO_PV \ ALTERNATIVE __stringify(ASM_NOP24), \ - DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR + DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_PV /* Use when exiting to HVM guest context. */ #define SPEC_CTRL_EXIT_TO_HVM \ ALTERNATIVE __stringify(ASM_NOP24), \ - DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR + DO_SPEC_CTRL_EXIT_TO_GUEST, X86_FEATURE_SC_MSR_HVM /* * Use in IST interrupt/exception context. May interrupt Xen or PV context.
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