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SUSE:SLE-12-SP3:GA
xen.8005
551d1dbf-arm-Factor-out-psr_mode_is_user.patch
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File 551d1dbf-arm-Factor-out-psr_mode_is_user.patch of Package xen.8005
Subject: xen: arm: Factor out psr_mode_is_user From: Ian Campbell ian.campbell@citrix.com Mon Mar 30 12:12:22 2015 +0100 Date: Thu Apr 2 11:45:19 2015 +0100: Git: fe6bc7d95bc9c518ef3b0faaf899a3294c456c4b This embodies the logic on arm64 that userspace can be either 32-bit or 64-bit. It will be used in other places shortly. Note that the logic differs slightly because the original (in inject_abt64_exception) knew that the kernel was 64-bit and could therefore assume that any 32-bit mode was userspace. Instead the refactored code explicitly checks for usr mode. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Reviewed-by: Julien Grall <julien.grall@linaro.org> (cherry picked from commit 9e1342cf1aabf5841293d32c918f59ffee01ec67) Index: xen-4.4.4-testing/xen/arch/arm/traps.c =================================================================== --- xen-4.4.4-testing.orig/xen/arch/arm/traps.c +++ xen-4.4.4-testing/xen/arch/arm/traps.c @@ -451,14 +451,7 @@ static void inject_abt64_exception(struc .len = instr_len, }; - /* - * Trap may have been taken from EL0, which might be in AArch32 - * mode (PSR_MODE_BIT set), or in AArch64 mode (PSR_MODE_EL0t). - * - * Since we know the kernel must be 64-bit any trap from a 32-bit - * mode must have been from EL0. - */ - if ( psr_mode_is_32bit(regs->cpsr) || psr_mode(regs->cpsr,PSR_MODE_EL0t) ) + if ( psr_mode_is_user(regs) ) esr.ec = prefetch ? HSR_EC_INSTR_ABORT_LOWER_EL : HSR_EC_DATA_ABORT_LOWER_EL; else Index: xen-4.4.4-testing/xen/include/asm-arm/regs.h =================================================================== --- xen-4.4.4-testing.orig/xen/include/asm-arm/regs.h +++ xen-4.4.4-testing/xen/include/asm-arm/regs.h @@ -24,9 +24,17 @@ #ifdef CONFIG_ARM_32 #define hyp_mode(r) psr_mode((r)->cpsr,PSR_MODE_HYP) +#define psr_mode_is_user(r) usr_mode(r) #else #define hyp_mode(r) (psr_mode((r)->cpsr,PSR_MODE_EL2h) || \ psr_mode((r)->cpsr,PSR_MODE_EL2t)) + +/* + * Trap may have been taken from EL0, which might be in AArch32 usr + * mode, or in AArch64 mode (PSR_MODE_EL0t). + */ +#define psr_mode_is_user(r) \ + (psr_mode((r)->cpsr,PSR_MODE_EL0t) || usr_mode(r)) #endif #define guest_mode(r) \
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