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SUSE:SLE-12-SP3:GA
xen.8005
591203a4-x86-pv-fix-int80-bounce-handling.patch
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File 591203a4-x86-pv-fix-int80-bounce-handling.patch of Package xen.8005
# Commit 55ab172a1f286742d918947ecb9b257ce31cc253 # Date 2017-05-09 19:00:04 +0100 # Author Andrew Cooper <andrew.cooper3@citrix.com> # Committer Andrew Cooper <andrew.cooper3@citrix.com> x86/pv: Fix bugs with the handling of int80_bounce Testing has revealed two issues: 1) Passing a NULL handle to set_trap_table() is intended to flush the entire table. The 64bit guest case (and 32bit guest on 32bit Xen, when it existed) called init_int80_direct_trap() to reset int80_bounce, but c/s cda335c279 which introduced the 32bit guest on 64bit Xen support omitted this step. Previously therefore, it was impossible for a 32bit guest to reset its registered int80_bounce details. 2) init_int80_direct_trap() doesn't honour the guests request to have interrupts disabled on entry. PVops Linux requests that interrupts are disabled, but Xen currently leaves them enabled when following the int80 fastpath. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/x86_64/compat/traps.c +++ b/xen/arch/x86/x86_64/compat/traps.c @@ -324,6 +324,7 @@ int compat_set_trap_table(XEN_GUEST_HAND if ( guest_handle_is_null(traps) ) { memset(dst, 0, NR_VECTORS * sizeof(*dst)); + init_int80_direct_trap(current); return 0; } --- a/xen/arch/x86/x86_64/traps.c +++ b/xen/arch/x86/x86_64/traps.c @@ -449,12 +449,13 @@ void init_int80_direct_trap(struct vcpu struct trap_info *ti = &v->arch.pv_vcpu.trap_ctxt[0x80]; struct trap_bounce *tb = &v->arch.pv_vcpu.int80_bounce; - tb->flags = TBF_EXCEPTION; tb->cs = ti->cs; tb->eip = ti->address; if ( null_trap_bounce(v, tb) ) tb->flags = 0; + else + tb->flags = TBF_EXCEPTION | (TI_GET_IF(ti) ? TBF_INTERRUPT : 0); } static long register_guest_callback(struct callback_register *reg)
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