Sign Up
Log In
Log In
or
Sign Up
Places
All Projects
Status Monitor
Collapse sidebar
SUSE:SLE-12-SP3:GA
xen.8426
57fb6a91-x86-defer-not-present-segment-checks.p...
Overview
Repositories
Revisions
Requests
Users
Attributes
Meta
File 57fb6a91-x86-defer-not-present-segment-checks.patch of Package xen.8426
# Commit 78ff18c905318a9b1e5dd32662986f03b10a4e56 # Date 2016-10-10 12:16:49 +0200 # Author Jan Beulich <jbeulich@suse.com> # Committer Jan Beulich <jbeulich@suse.com> x86: defer not-present segment checks Following on from commits 5602e74c60 ("x86emul: correct loading of %ss") and bdb860d01c ("x86/HVM: correct segment register loading during task switch") the point of the non-.present checks needs to be refined: #NP (and its #SS companion), other than suggested by the various instruction pages in Intel's SDM, gets checked for only after all type and permission checks. The only checks getting done even later are the long mode specific ones for system descriptors (which we don't support yet) and 64-bit code segments (i.e. anything touching other than the attribute byte). Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> # Commit 13b9f31751a55a96e86bd7e64b433a62a4a5b71e # Date 2016-10-14 12:43:17 +0100 # Author Andrew Cooper <andrew.cooper3@citrix.com> # Committer Andrew Cooper <andrew.cooper3@citrix.com> x86/hvm: Correct the position of the %cs L/D checks Contrary to the description in the software manuals, in Long Mode, attempts to load %cs check that D is not set in combination with L before the present flag is checked. This can be observed because the L/D check fails with #GP before the presence check failes with #NP. This change partially reverts c/s 78ff18c90 "x86: defer not-present segment checks", taking it back to how it was in the v1 submission. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3615,13 +3615,6 @@ static int hvm_load_segment_selector( do { desc = *pdesc; - /* Segment present in memory? */ - if ( !(desc.b & _SEGMENT_P) ) - { - fault_type = TRAP_no_segment; - goto unmap_and_fail; - } - /* LDT descriptor is a system segment. All others are code/data. */ if ( (desc.b & (1u<<12)) == ((seg == x86_seg_ldtr) << 12) ) goto unmap_and_fail; @@ -3666,6 +3659,14 @@ static int hvm_load_segment_selector( goto unmap_and_fail; break; } + + /* Segment present in memory? */ + if ( !(desc.b & _SEGMENT_P) ) + { + fault_type = (seg != x86_seg_ss) ? TRAP_no_segment + : TRAP_stack_error; + goto unmap_and_fail; + } } while ( !(desc.b & 0x100) && /* Ensure Accessed flag is set */ (cmpxchg(&pdesc->b, desc.b, desc.b | 0x100) != desc.b) ); @@ -3749,12 +3750,6 @@ void hvm_task_switch( if ( tr.attr.fields.g ) tr.limit = (tr.limit << 12) | 0xfffu; - if ( !tr.attr.fields.p ) - { - hvm_inject_hw_exception(TRAP_no_segment, tss_sel & 0xfff8); - goto out; - } - if ( tr.attr.fields.type != ((taskswitch_reason == TSW_iret) ? 0xb : 0x9) ) { hvm_inject_hw_exception( @@ -3763,6 +3758,12 @@ void hvm_task_switch( goto out; } + if ( !tr.attr.fields.p ) + { + hvm_inject_hw_exception(TRAP_no_segment, tss_sel & 0xfff8); + goto out; + } + if ( tr.limit < (sizeof(tss)-1) ) { hvm_inject_hw_exception(TRAP_invalid_tss, tss_sel & 0xfff8); --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -1182,7 +1182,7 @@ protmode_load_seg( struct { uint32_t a, b; } desc; uint8_t dpl, rpl; int cpl = get_cpl(ctxt, ops); - uint32_t new_desc_b, a_flag = 0x100; + uint32_t a_flag = 0x100; int rc, fault_type = EXC_GP; if ( cpl < 0 ) @@ -1223,13 +1223,6 @@ protmode_load_seg( &desc, sizeof(desc), ctxt)) ) return rc; - /* Segment present in memory? */ - if ( !(desc.b & (1u<<15)) ) - { - fault_type = seg != x86_seg_ss ? EXC_NP : EXC_SS; - goto raise_exn; - } - if ( !is_x86_user_segment(seg) ) { /* System segments must have S flag == 0. */ @@ -1264,7 +1257,11 @@ protmode_load_seg( /* Non-conforming segment: check RPL and DPL against CPL. */ : rpl > cpl || dpl != cpl ) goto raise_exn; - /* 64-bit code segments (L bit set) must have D bit clear. */ + /* + * 64-bit code segments (L bit set) must have D bit clear. + * Experimentally in long mode, the L and D bits are checked before + * the Present bit. + */ if ( in_longmode(ctxt, ops) && (desc.b & (1 << 21)) && (desc.b & (1 << 22)) ) goto raise_exn; @@ -1281,7 +1278,8 @@ protmode_load_seg( /* LDT system segment? */ if ( (desc.b & (15u<<8)) != (2u<<8) ) goto raise_exn; - goto skip_accessed_flag; + a_flag = 0; + break; case x86_seg_tr: /* Available TSS system segment? */ if ( (desc.b & (15u<<8)) != (9u<<8) ) @@ -1299,18 +1297,26 @@ protmode_load_seg( break; } + /* Segment present in memory? */ + if ( !(desc.b & (1 << 15)) ) + { + fault_type = seg != x86_seg_ss ? EXC_NP : EXC_SS; + goto raise_exn; + } + /* Ensure Accessed flag is set. */ - new_desc_b = desc.b | a_flag; - if ( !(desc.b & a_flag) && - ((rc = ops->cmpxchg( - x86_seg_none, desctab.base + (sel & 0xfff8) + 4, - &desc.b, &new_desc_b, 4, ctxt)) != 0) ) - return rc; + if ( a_flag && !(desc.b & a_flag) ) + { + uint32_t new_desc_b = desc.b | a_flag; - /* Force the Accessed flag in our local copy. */ - desc.b |= a_flag; + if ( (rc = ops->cmpxchg(x86_seg_none, desctab.base + (sel & 0xfff8) + 4, + &desc.b, &new_desc_b, 4, ctxt)) != 0 ) + return rc; + + /* Force the Accessed flag in our local copy. */ + desc.b = new_desc_b; + } - skip_accessed_flag: sreg->base = (((desc.b << 0) & 0xff000000u) | ((desc.b << 16) & 0x00ff0000u) | ((desc.a >> 16) & 0x0000ffffu));
Locations
Projects
Search
Status Monitor
Help
OpenBuildService.org
Documentation
API Documentation
Code of Conduct
Contact
Support
@OBShq
Terms
openSUSE Build Service is sponsored by
The Open Build Service is an
openSUSE project
.
Sign Up
Log In
Places
Places
All Projects
Status Monitor