File gcc48-bnc1087932.patch of Package cross-ppc-gcc48-icecream-backend

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File gcc48-bnc1087932.patch of Package cross-ppc-gcc48-icecream-backend (Revision 5f7aba3a88a93de8e9b0525c9aac7f8d)

Currently displaying revision 5f7aba3a88a93de8e9b0525c9aac7f8d , Show latest

2015-05-12  Yvan Roux  <yvan.roux@linaro.org>

Backport from mainline.
	2015-05-05  Yvan Roux  <yvan.roux@linaro.org>

* config/aarch64/aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define.
	(LINK_SPEC): Include CA53_ERR_843419_SPEC.
	* config/aarch64/aarch64-linux.h (CA53_ERR_843419_SPEC): Define.
	(LINK_SPEC): Include CA53_ERR_843419_SPEC.
	* config/aarch64/aarch64.opt (mfix-cortex-a53-843419): New option.
	* configure: Regenerate.
	* configure.ac: Add --enable-fix-cortex-a53-843419 option.
	* doc/install.texi (aarch64*-*-*): Document new
	--enable-fix-cortex-a53-843419 option.
	* doc/invoke.texi (AArch64 Options): Document -mfix-cortex-a53-843419
	and -mno-fix-cortex-a53-843419 options.

Index: gcc/config/aarch64/aarch64-elf-raw.h
===================================================================
--- gcc/config/aarch64/aarch64-elf-raw.h	(revision 235439)
+++ gcc/config/aarch64/aarch64-elf-raw.h	(working copy)
@@ -33,9 +33,18 @@
   " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
 #endif
 
+#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
+#define CA53_ERR_843419_SPEC \
+  " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#else
+#define CA53_ERR_843419_SPEC \
+  " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#endif
+
 #ifndef LINK_SPEC
 #define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X" \
-                  CA53_ERR_835769_SPEC
+                  CA53_ERR_835769_SPEC \
+                  CA53_ERR_843419_SPEC
 #endif
 
 #endif /* GCC_AARCH64_ELF_RAW_H */
Index: gcc/config/aarch64/aarch64-linux.h
===================================================================
--- gcc/config/aarch64/aarch64-linux.h	(revision 235439)
+++ gcc/config/aarch64/aarch64-linux.h	(working copy)
@@ -42,8 +42,17 @@
   " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
 #endif
 
+#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
+#define CA53_ERR_843419_SPEC \
+  " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#else
+#define CA53_ERR_843419_SPEC \
+  " %{mfix-cortex-a53-843419:--fix-cortex-a53-843419}"
+#endif
+
 #define LINK_SPEC LINUX_TARGET_LINK_SPEC \
-                  CA53_ERR_835769_SPEC
+                  CA53_ERR_835769_SPEC \
+                  CA53_ERR_843419_SPEC
 
 #define TARGET_OS_CPP_BUILTINS()		\
   do						\
Index: gcc/config/aarch64/aarch64.opt
===================================================================
--- gcc/config/aarch64/aarch64.opt	(revision 235439)
+++ gcc/config/aarch64/aarch64.opt	(working copy)
@@ -71,6 +71,10 @@ mfix-cortex-a53-835769
 Target Report Var(aarch64_fix_a53_err835769) Init(2)
 Workaround for ARM Cortex-A53 Erratum number 835769
 
+mfix-cortex-a53-843419
+Target Report
+Workaround for ARM Cortex-A53 Erratum number 843419
+
 mlittle-endian
 Target Report RejectNegative InverseMask(BIG_END)
 Assume target CPU is configured as little endian
Index: gcc/configure
===================================================================
--- gcc/configure	(revision 235439)
+++ gcc/configure	(working copy)
@@ -911,6 +911,7 @@ enable_gnu_indirect_function
 enable_initfini_array
 enable_comdat
 enable_fix_cortex_a53_835769
+enable_fix_cortex_a53_843419
 enable_gnu_unique_object
 enable_linker_build_id
 with_long_double_128
@@ -1628,6 +1629,14 @@ Optional Features:
                           disable workaround for AArch64 Cortex-A53 erratum
                           835769 by default
 
+
+  --enable-fix-cortex-a53-843419
+                          enable workaround for AArch64 Cortex-A53 erratum
+                          843419 by default
+  --disable-fix-cortex-a53-843419
+                          disable workaround for AArch64 Cortex-A53 erratum
+                          843419 by default
+
   --enable-gnu-unique-object
                           enable the use of the @gnu_unique_object ELF
                           extension on glibc systems
@@ -17847,7 +17856,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 17850 "configure"
+#line 17859 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -17953,7 +17962,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 17956 "configure"
+#line 17965 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -23822,6 +23831,25 @@ if test "${enable_fix_cortex_a53_835769+
   Valid choices are 'yes' and 'no'." "$LINENO" 5
             ;;
 
+        esac
+
+fi
+
+    # Enable default workaround for AArch64 Cortex-A53 erratum 843419.
+    # Check whether --enable-fix-cortex-a53-843419 was given.
+if test "${enable_fix_cortex_a53_843419+set}" = set; then :
+  enableval=$enable_fix_cortex_a53_843419;
+        case $enableval in
+          yes)
+            tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1"
+            ;;
+          no)
+            ;;
+          *)
+            as_fn_error "'$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\
+  Valid choices are 'yes' and 'no'." "$LINENO" 5
+            ;;
+
         esac
 
 fi
Index: gcc/configure.ac
===================================================================
--- gcc/configure.ac	(revision 235439)
+++ gcc/configure.ac	(working copy)
@@ -3468,6 +3468,29 @@ AS_HELP_STRING([--disable-fix-cortex-a53
         esac
       ],
     [])
+    # Enable default workaround for AArch64 Cortex-A53 erratum 843419.
+    AC_ARG_ENABLE(fix-cortex-a53-843419,
+    [
+AS_HELP_STRING([--enable-fix-cortex-a53-843419],
+        [enable workaround for AArch64 Cortex-A53 erratum 843419 by default])
+AS_HELP_STRING([--disable-fix-cortex-a53-843419],
+        [disable workaround for AArch64 Cortex-A53 erratum 843419 by default])
+    ],
+      [
+        case $enableval in
+          yes)
+            tm_defines="${tm_defines} TARGET_FIX_ERR_A53_843419_DEFAULT=1"
+            ;;
+          no)
+            ;;
+          *)
+            AC_MSG_ERROR(['$enableval' is an invalid value for --enable-fix-cortex-a53-843419.\
+  Valid choices are 'yes' and 'no'.])
+            ;;
+
+        esac
+      ],
+    [])
   ;;
   # All TARGET_ABI_OSF targets.
   alpha*-*-linux* | alpha*-*-*bsd*)
Index: gcc/doc/install.texi
===================================================================
--- gcc/doc/install.texi	(revision 235439)
+++ gcc/doc/install.texi	(working copy)
@@ -3131,13 +3131,24 @@ information have to.
 To enable a workaround for the Cortex-A53 erratum number 835769 by default
 (for all CPUs regardless of -mcpu option given) at configure time use the
 @option{--enable-fix-cortex-a53-835769} option.  This will enable the fix by
-default and can be explicitly disabled during during compilation by passing the
+default and can be explicitly disabled during compilation by passing the
 @option{-mno-fix-cortex-a53-835769} option.  Conversely,
 @option{--disable-fix-cortex-a53-835769} will disable the workaround by
 default.  The workaround is disabled by default if neither of
 @option{--enable-fix-cortex-a53-835769} or
 @option{--disable-fix-cortex-a53-835769} is given at configure time.
 
+To enable a workaround for the Cortex-A53 erratum number 843419 by default
+(for all CPUs regardless of -mcpu option given) at configure time use the
+@option{--enable-fix-cortex-a53-843419} option.  This workaround is applied at
+link time.  Enabling the workaround will cause GCC to pass the relevant option
+to the linker.  It can be explicitly disabled during compilation by passing the
+@option{-mno-fix-cortex-a53-843419} option.  Conversely,
+@option{--disable-fix-cortex-a53-843419} will disable the workaround by default.
+The workaround is disabled by default if neither of
+@option{--enable-fix-cortex-a53-843419} or
+@option{--disable-fix-cortex-a53-843419} is given at configure time.
+
 @heading @anchor{alpha-x-x}alpha*-*-*
 
 This section contains general configuration information for all
Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi	(revision 235439)
+++ gcc/doc/invoke.texi	(working copy)
@@ -476,6 +476,7 @@ Objective-C and Objective-C++ Dialects}.
 -momit-leaf-frame-pointer  -mno-omit-leaf-frame-pointer @gol
 -mtls-dialect=desc  -mtls-dialect=traditional @gol
 -mfix-cortex-a53-835769  -mno-fix-cortex-a53-835769 @gol
+-mfix-cortex-a53-843419  -mno-fix-cortex-a53-843419 @gol
 -march=@var{name}  -mcpu=@var{name}  -mtune=@var{name}}
 
 @emph{Adapteva Epiphany Options}
@@ -10943,6 +10944,14 @@ Enable or disable the workaround for the
 This will involve inserting a NOP instruction between memory instructions and
 64-bit integer multiply-accumulate instructions.
 
+@item -mfix-cortex-a53-843419
+@itemx -mno-fix-cortex-a53-843419
+@opindex mfix-cortex-a53-843419
+@opindex mno-fix-cortex-a53-843419
+Enable or disable the workaround for the ARM Cortex-A53 erratum number 843419.
+This erratum workaround is made at link time and this will only pass the
+corresponding flag to the linker.
+
 @item -march=@var{name}
 @opindex march
 Specify the name of the target architecture, optionally suffixed by one or

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File gcc48-bnc1087932.patch of Package cross-ppc-gcc48-icecream-backend (Revision 5f7aba3a88a93de8e9b0525c9aac7f8d)

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