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SUSE:SLE-12-SP4:GA
libaio
00_arches_sh.patch
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File 00_arches_sh.patch of Package libaio
From: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Subject: Add SH supprt The test-suite logs can be found at: <http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=535288> --- harness/main.c | 2 - src/libaio.h | 10 +++++++ src/syscall-sh.h | 78 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ src/syscall.h | 2 + 4 files changed, 91 insertions(+), 1 deletion(-) Index: libaio-0.3.109/harness/main.c =================================================================== --- libaio-0.3.109.orig/harness/main.c +++ libaio-0.3.109/harness/main.c @@ -14,7 +14,7 @@ #if __LP64__ == 0 #if defined(__i386__) || defined(__pwoerpc__) || defined(__mips__) #define KERNEL_RW_POINTER ((void *)0xc0010000) -#elif defined(__arm__) || defined(__m68k__) || defined(__s390__) +#elif defined(__arm__) || defined(__m68k__) || defined(__s390__) || defined(__sh__) #define KERNEL_RW_POINTER ((void *)0x00010000) #elif defined(__hppa__) #define KERNEL_RW_POINTER ((void *)0x10100000) Index: libaio-0.3.109/src/libaio.h =================================================================== --- libaio-0.3.109.orig/src/libaio.h +++ libaio-0.3.109/src/libaio.h @@ -107,6 +107,16 @@ typedef enum io_iocb_cmd { # else # error "neither mipseb nor mipsel?" # endif +#elif defined(__sh__) /* sh3/sh4*/ +# if defined (__BIG_ENDIAN__) /* big endian, 32 bits */ +#define PADDED(x, y) unsigned y; x +#define PADDEDptr(x, y) unsigned y; x +#define PADDEDul(x, y) unsigned y; unsigned long x +# elif defined(__LITTLE_ENDIAN__) /* little endian, 32 bits */ +#define PADDED(x, y) x; unsigned y +#define PADDEDptr(x, y) x; unsigned y +#define PADDEDul(x, y) unsigned long x; unsigned y +# endif #else #error endian? #endif Index: libaio-0.3.109/src/syscall-sh.h =================================================================== --- /dev/null +++ libaio-0.3.109/src/syscall-sh.h @@ -0,0 +1,78 @@ +/* Copy from ./arch/sh/include/asm/unistd_32.h */ +#define __NR_io_setup 245 +#define __NR_io_destroy 246 +#define __NR_io_getevents 247 +#define __NR_io_submit 248 +#define __NR_io_cancel 249 + +#define io_syscall1(type,fname,sname,type1,arg1) \ +type fname(type1 arg1) \ +{ \ +register long __sc0 __asm__ ("r3") = __NR_##sname; \ +register long __sc4 __asm__ ("r4") = (long) arg1; \ +__asm__ __volatile__ ("trapa #0x11" \ + : "=z" (__sc0) \ + : "0" (__sc0), "r" (__sc4) \ + : "memory"); \ + return (type) __sc0;\ +} + +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \ +type fname(type1 arg1,type2 arg2) \ +{ \ +register long __sc0 __asm__ ("r3") = __NR_##sname; \ +register long __sc4 __asm__ ("r4") = (long) arg1; \ +register long __sc5 __asm__ ("r5") = (long) arg2; \ + __asm__ __volatile__ ("trapa #0x12" \ + : "=z" (__sc0) \ + : "0" (__sc0), "r" (__sc4), "r" (__sc5) \ + : "memory"); \ + return (type) __sc0;\ +} + +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \ +type fname(type1 arg1,type2 arg2,type3 arg3) \ +{ \ +register long __sc0 __asm__ ("r3") = __NR_##sname; \ +register long __sc4 __asm__ ("r4") = (long) arg1; \ +register long __sc5 __asm__ ("r5") = (long) arg2; \ +register long __sc6 __asm__ ("r6") = (long) arg3; \ + __asm__ __volatile__ ("trapa #0x13" \ + : "=z" (__sc0) \ + : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6) \ + : "memory"); \ + return (type) __sc0;\ +} + +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ +{ \ +register long __sc0 __asm__ ("r3") = __NR_##sname; \ +register long __sc4 __asm__ ("r4") = (long) arg1; \ +register long __sc5 __asm__ ("r5") = (long) arg2; \ +register long __sc6 __asm__ ("r6") = (long) arg3; \ +register long __sc7 __asm__ ("r7") = (long) arg4; \ +__asm__ __volatile__ ("trapa #0x14" \ + : "=z" (__sc0) \ + : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6), \ + "r" (__sc7) \ + : "memory" ); \ + return (type) __sc0;\ +} + +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ +{ \ +register long __sc3 __asm__ ("r3") = __NR_##sname; \ +register long __sc4 __asm__ ("r4") = (long) arg1; \ +register long __sc5 __asm__ ("r5") = (long) arg2; \ +register long __sc6 __asm__ ("r6") = (long) arg3; \ +register long __sc7 __asm__ ("r7") = (long) arg4; \ +register long __sc0 __asm__ ("r0") = (long) arg5; \ +__asm__ __volatile__ ("trapa #0x15" \ + : "=z" (__sc0) \ + : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6), "r" (__sc7), \ + "r" (__sc3) \ + : "memory" ); \ + return (type) __sc0;\ +} Index: libaio-0.3.109/src/syscall.h =================================================================== --- libaio-0.3.109.orig/src/syscall.h +++ libaio-0.3.109/src/syscall.h @@ -32,6 +32,8 @@ #include "syscall-parisc.h" #elif defined(__mips__) #include "syscall-mips.h" +#elif defined(__sh__) +#include "syscall-sh.h" #else #error "add syscall-arch.h" #endif
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