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SUSE:SLE-12-SP4:Update
xen.16559
5769106e-x86-generate-assembler-equates-for-syn...
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File 5769106e-x86-generate-assembler-equates-for-synthesized.patch of Package xen.16559
References: bsc#970135 # Commit 06f083c826836a098f793db821845b313ad88a7f # Date 2016-06-21 12:01:18 +0200 # Author Jan Beulich <jbeulich@suse.com> # Committer Jan Beulich <jbeulich@suse.com> x86: also generate assembler usable equates for synthesized features ... to make it possible to base alternative instruction patching upon such. Signed-off-by: Jan Beulich <jbeulich@suse.com> Tested-by: Dario Faggioli <dario.faggioli@citrix.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -219,7 +219,8 @@ long arch_do_sysctl( } /* Clip the number of entries. */ - nr = min(sysctl->u.cpu_featureset.nr_features, FSCAPINTS); + nr = min_t(unsigned int, sysctl->u.cpu_featureset.nr_features, + FSCAPINTS); /* Look up requested featureset. */ if ( sysctl->u.cpu_featureset.index < ARRAY_SIZE(featureset_table) ) --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -3,8 +3,34 @@ * * Defines x86 CPU feature bits */ +#if defined(XEN_CPUFEATURE) -#ifndef __ASM_I386_CPUFEATURE_H +/* Other features, Xen-defined mapping. */ +/* This range is used for feature bits which conflict or are synthesized */ +XEN_CPUFEATURE(CONSTANT_TSC, (FSCAPINTS+0)*32+ 0) /* TSC ticks at a constant rate */ +XEN_CPUFEATURE(NONSTOP_TSC, (FSCAPINTS+0)*32+ 1) /* TSC does not stop in C states */ +XEN_CPUFEATURE(ARAT, (FSCAPINTS+0)*32+ 2) /* Always running APIC timer */ +XEN_CPUFEATURE(ARCH_PERFMON, (FSCAPINTS+0)*32+ 3) /* Intel Architectural PerfMon */ +XEN_CPUFEATURE(TSC_RELIABLE, (FSCAPINTS+0)*32+ 4) /* TSC is known to be reliable */ +XEN_CPUFEATURE(XTOPOLOGY, (FSCAPINTS+0)*32+ 5) /* cpu topology enum extensions */ +XEN_CPUFEATURE(CPUID_FAULTING, (FSCAPINTS+0)*32+ 6) /* cpuid faulting */ +XEN_CPUFEATURE(CLFLUSH_MONITOR, (FSCAPINTS+0)*32+ 7) /* clflush reqd with monitor */ +XEN_CPUFEATURE(APERFMPERF, (FSCAPINTS+0)*32+ 8) /* APERFMPERF */ +XEN_CPUFEATURE(MSR_PLATFORM_INFO, (FSCAPINTS+0)*32+ 9) /* PLATFORM_INFO MSR present */ +XEN_CPUFEATURE(LFENCE_DISPATCH, (FSCAPINTS+0)*32+ 10) /* lfence set as Dispatch Serialising */ +XEN_CPUFEATURE(IND_THUNK_LFENCE,(FSCAPINTS+0)*32+ 11) /* Use IND_THUNK_LFENCE */ +XEN_CPUFEATURE(IND_THUNK_JMP, (FSCAPINTS+0)*32+ 12) /* Use IND_THUNK_JMP */ +XEN_CPUFEATURE(XEN_IBPB, (FSCAPINTS+0)*32+ 13) /* IBRSB || IBPB */ +XEN_CPUFEATURE(SC_MSR_PV, (FSCAPINTS+0)*32+ 14) /* MSR_SPEC_CTRL used by Xen for PV */ +XEN_CPUFEATURE(SC_MSR_HVM, (FSCAPINTS+0)*32+ 15) /* MSR_SPEC_CTRL used by Xen for HVM */ +XEN_CPUFEATURE(SC_RSB_PV, (FSCAPINTS+0)*32+ 16) /* RSB overwrite needed for PV */ +XEN_CPUFEATURE(SC_RSB_HVM, (FSCAPINTS+0)*32+ 17) /* RSB overwrite needed for HVM */ +XEN_CPUFEATURE(NO_XPTI, (FSCAPINTS+0)*32+ 18) /* XPTI mitigation not in use */ +XEN_CPUFEATURE(SC_MSR_IDLE, (FSCAPINTS+0)*32+ 19) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */ + +#define NCAPINTS (FSCAPINTS + 1) /* N 32-bit words worth of info */ + +#elif !defined(__ASM_I386_CPUFEATURE_H) #ifndef X86_FEATURES_ONLY #define __ASM_I386_CPUFEATURE_H #endif @@ -12,31 +38,6 @@ #include <xen/const.h> #include <asm/cpuid.h> -#define NCAPINTS (FSCAPINTS + 1) /* N 32-bit words worth of info */ - -/* Other features, Xen-defined mapping. */ -/* This range is used for feature bits which conflict or are synthesized */ -#define X86_FEATURE_CONSTANT_TSC ((FSCAPINTS+0)*32+ 0) /* TSC ticks at a constant rate */ -#define X86_FEATURE_NONSTOP_TSC ((FSCAPINTS+0)*32+ 1) /* TSC does not stop in C states */ -#define X86_FEATURE_ARAT ((FSCAPINTS+0)*32+ 2) /* Always running APIC timer */ -#define X86_FEATURE_ARCH_PERFMON ((FSCAPINTS+0)*32+ 3) /* Intel Architectural PerfMon */ -#define X86_FEATURE_TSC_RELIABLE ((FSCAPINTS+0)*32+ 4) /* TSC is known to be reliable */ -#define X86_FEATURE_XTOPOLOGY ((FSCAPINTS+0)*32+ 5) /* cpu topology enum extensions */ -#define X86_FEATURE_CPUID_FAULTING ((FSCAPINTS+0)*32+ 6) /* cpuid faulting */ -#define X86_FEATURE_CLFLUSH_MONITOR ((FSCAPINTS+0)*32+ 7) /* clflush reqd with monitor */ -#define X86_FEATURE_APERFMPERF ((FSCAPINTS+0)*32+ 8) /* APERFMPERF */ -#define X86_FEATURE_MSR_PLATFORM_INFO ((FSCAPINTS+0)*32+ 9) /* PLATFORM_INFO MSR present */ -#define X86_FEATURE_LFENCE_DISPATCH ((FSCAPINTS+0)*32+ 10) /* lfence set as Dispatch Serialising */ -#define X86_FEATURE_IND_THUNK_LFENCE ((FSCAPINTS+0)*32+ 11) /* Use IND_THUNK_LFENCE */ -#define X86_FEATURE_IND_THUNK_JMP ((FSCAPINTS+0)*32+ 12) /* Use IND_THUNK_JMP */ -#define X86_FEATURE_XEN_IBPB ((FSCAPINTS+0)*32+ 13) /* IBRSB || IBPB */ -#define X86_FEATURE_SC_MSR_PV ((FSCAPINTS+0)*32+ 14) /* MSR_SPEC_CTRL used by Xen for PV */ -#define X86_FEATURE_SC_MSR_HVM ((FSCAPINTS+0)*32+ 15) /* MSR_SPEC_CTRL used by Xen for HVM */ -#define X86_FEATURE_SC_RSB_PV ((FSCAPINTS+0)*32+ 16) /* RSB overwrite needed for PV */ -#define X86_FEATURE_SC_RSB_HVM ((FSCAPINTS+0)*32+ 17) /* RSB overwrite needed for HVM */ -#define X86_FEATURE_NO_XPTI ((FSCAPINTS+0)*32+ 18) /* XPTI mitigation not in use */ -#define X86_FEATURE_SC_MSR_IDLE ((FSCAPINTS+0)*32+ 19) /* (SC_MSR_PV || SC_MSR_HVM) && default_xen_spec_ctrl */ - #define cpufeat_word(idx) ((idx) / 32) #define cpufeat_bit(idx) ((idx) % 32) #define cpufeat_mask(idx) (_AC(1, U) << cpufeat_bit(idx)) --- a/xen/include/asm-x86/cpufeatureset.h +++ b/xen/include/asm-x86/cpufeatureset.h @@ -3,19 +3,25 @@ #ifndef __ASSEMBLY__ +#include <xen/stringify.h> + #define XEN_CPUFEATURE(name, value) X86_FEATURE_##name = value, enum { #include <public/arch-x86/cpufeatureset.h> +#include <asm/cpufeature.h> }; #undef XEN_CPUFEATURE -#define XEN_CPUFEATURE(name, value) asm (".equ X86_FEATURE_" #name ", " #value); +#define XEN_CPUFEATURE(name, value) asm (".equ X86_FEATURE_" #name ", " \ + __stringify(value)); #include <public/arch-x86/cpufeatureset.h> +#include <asm/cpufeature.h> #else /* !__ASSEMBLY__ */ #define XEN_CPUFEATURE(name, value) .equ X86_FEATURE_##name, value #include <public/arch-x86/cpufeatureset.h> +#include <asm/cpufeature.h> #endif /* __ASSEMBLY__ */ --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -1,12 +1,13 @@ #ifndef __X86_CPUID_H__ #define __X86_CPUID_H__ -#include <asm/cpufeatureset.h> #include <asm/cpuid-autogen.h> -#include <asm/percpu.h> #define FSCAPINTS FEATURESET_NR_ENTRIES +#include <asm/cpufeatureset.h> +#include <asm/percpu.h> + #define FEATURESET_1d 0 /* 0x00000001.edx */ #define FEATURESET_1c 1 /* 0x00000001.ecx */ #define FEATURESET_e1d 2 /* 0x80000001.edx */ --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -306,7 +306,7 @@ def write_results(state): state.output.write( """ -#define FEATURESET_NR_ENTRIES _AC(%s,U) +#define FEATURESET_NR_ENTRIES %s #define CPUID_COMMON_1D_FEATURES %s
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