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SUSE:SLE-12-SP4:Update
xen.17651
xsa286-1.patch
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File xsa286-1.patch of Package xen.17651
From: Andrew Cooper <andrew.cooper3@citrix.com> Date: Thu, 22 Oct 2020 11:28:58 +0100 Subject: [PATCH 1/2] x86/pv: Drop FLUSH_TLB_GLOBAL in do_mmu_update() for XPTI c/s 9d1d31ad9498 "x86: slightly reduce Meltdown band-aid overhead" removed the use of Global TLB flushes on the Xen entry path, but added a FLUSH_TLB_GLOBAL to the L4 path in do_mmu_update(). However, this was unnecessary. It is the guests responsibility to perform appropriate TLB flushing if the L4 modification altered an established mapping in a flush-relevant way. In this case, an MMUEXT_OP hypercall will follow. The case which Xen needs to cover is when new mappings are created, and the resync on the exit-to-guest path covers this correctly. There is a corner case with multiple vCPUs in hypercalls at the same time, which 9d1d31ad9498 changed, and this patch changes back to its original XPTI behaviour. Architecturally, established TLB entries can continue to be used until the broadcast flush has completed. Therefore, even with concurrent hypercalls, the guest cannot depend on older mappings not being used until an MMUEXT_OP hypercall completes. Xen's implementation of guest-initiated flushes will take correct effect on top of an in-progress hypercall, picking up new mapping setting before the other vCPU's MMUEXT_OP completes. Note: The correctness of this change is not impacted by whether XPTI uses global mappings or not. Correctness there depends on the behaviour of Xen on the entry/exit paths when switching two/from the XPTI "shadow" pagetables. This is (not really) XSA-286 (but necessary to simplify the logic). Fixes: 9d1d31ad9498 ("x86: slightly reduce Meltdown band-aid overhead") Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -4235,7 +4235,7 @@ long do_mmu_update( cpumask_andnot(mask, pt_owner->dirty_cpumask, cpumask_of(cpu)); if ( !cpumask_empty(mask) ) - flush_mask(mask, FLUSH_TLB_GLOBAL | FLUSH_ROOT_PGTBL); + flush_mask(mask, FLUSH_ROOT_PGTBL); } perfc_add(num_page_updates, i);
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