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SUSE:SLE-12-SP4:Update
xen.481
540f2624-x86-idle-add-barriers-to-CLFLUSH-worka...
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File 540f2624-x86-idle-add-barriers-to-CLFLUSH-workaround.patch of Package xen.481
# Commit 48d32458bcd453e31b458bca868a079a6d0a38af # Date 2014-09-09 18:09:08 +0200 # Author H. Peter Anvin <hpa@linux.intel.com> # Committer Jan Beulich <jbeulich@suse.com> x86, idle: add barriers to CLFLUSH workaround ... since the documentation is explicit that CLFLUSH is only ordered with respect to MFENCE. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/acpi/cpu_idle.c +++ b/xen/arch/x86/acpi/cpu_idle.c @@ -300,7 +300,11 @@ void mwait_idle_with_hints(unsigned int s_time_t expires = per_cpu(timer_deadline, cpu); if ( boot_cpu_has(X86_FEATURE_CLFLUSH_MONITOR) ) + { + mb(); clflush((void *)&mwait_wakeup(cpu)); + mb(); + } __monitor((void *)&mwait_wakeup(cpu), 0, 0); smp_mb();
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