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SUSE:SLE-12-SP5:Update
qemu.11145
0331-target-i386-define-md-clear-bit.patch
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File 0331-target-i386-define-md-clear-bit.patch of Package qemu.11145
From 968a92e001c9ed95e94d9844889d417e00b2d41f Mon Sep 17 00:00:00 2001 From: Paolo Bonzini <pbonzini@redhat.com> Date: Fri, 1 Mar 2019 21:40:52 +0100 Subject: [PATCH] target/i386: define md-clear bit md-clear is a new CPUID bit which is set when microcode provides the mechanism to invoke a flush of various exploitable CPU buffers by invoking the VERW instruction. Add the new feature. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [BR: BSC#1111331 CVE-2018-12126 CVE-2018-12127 CVE-2018-12130 CVE-2019-11091] Signed-off-by: Bruce Rogers <brogers@suse.com> --- target-i386/cpu.c | 2 +- target-i386/cpu.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 8f54d4b190..5b4c12557e 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -284,7 +284,7 @@ static const char *cpuid_7_0_ecx_feature_name[] = { static const char *cpuid_7_0_edx_feature_name[] = { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, + NULL, NULL, "md-clear", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 7bcacd92b5..c48fd59ec5 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -611,6 +611,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_7_0_ECX_PKU (1U << 3) #define CPUID_7_0_ECX_OSPKE (1U << 4) +#define CPUID_7_0_EDX_MD_CLEAR (1U << 10) /* Microarchitectural Data Clear */ #define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */ #define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypass Disable */
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