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SUSE:SLE-12:Update
xen.10697
5afc13ae-1-x86-read-MSR_ARCH_CAPABILITIES-once....
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File 5afc13ae-1-x86-read-MSR_ARCH_CAPABILITIES-once.patch of Package xen.10697
# Commit d6c65187252a6c1810fd24c4d46f812840de8d3c # Date 2018-05-16 12:19:10 +0100 # Author Andrew Cooper <andrew.cooper3@citrix.com> # Committer Andrew Cooper <andrew.cooper3@citrix.com> x86/spec_ctrl: Read MSR_ARCH_CAPABILITIES only once Make it available from the beginning of init_speculation_mitigations(), and pass it into appropriate functions. Fix an RSBA typo while moving the affected comment. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Reviewed-by: Wei Liu <wei.liu2@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -65,18 +65,15 @@ static int __init parse_bti(const char * } custom_param("bti", parse_bti); -static void __init print_details(enum ind_thunk thunk) +static void __init print_details(enum ind_thunk thunk, uint64_t caps) { unsigned int _7d0 = 0, e8b = 0, tmp; - uint64_t caps = 0; /* Collect diagnostics about available mitigations. */ if ( boot_cpu_data.cpuid_level >= 7 ) cpuid_count(7, 0, &tmp, &tmp, &tmp, &_7d0); if ( cpuid_eax(0x80000000) >= 0x80000008 ) cpuid(0x80000008, &tmp, &e8b, &tmp, &tmp); - if ( _7d0 & cpufeat_mask(X86_FEATURE_ARCH_CAPS) ) - rdmsrl(MSR_ARCH_CAPABILITIES, caps); printk(XENLOG_DEBUG "Speculative mitigation facilities:\n"); @@ -110,6 +107,10 @@ void __init init_speculation_mitigations { enum ind_thunk thunk = THUNK_DEFAULT; bool_t ibrs; + uint64_t caps = 0; + + if ( boot_cpu_has(X86_FEATURE_ARCH_CAPS) ) + rdmsrl(MSR_ARCH_CAPABILITIES, caps); if ( opt_ibrs != -1 ) ibrs = !!opt_ibrs; @@ -171,7 +172,7 @@ void __init init_speculation_mitigations /* (Re)init BSP state now that default_xen_* have been calculated. */ init_shadow_spec_ctrl_state(); - print_details(thunk); + print_details(thunk, caps); } /*
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