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SUSE:SLE-12:Update
xen.10697
5bdc31d5-VMX-fix-vmx_handle_eoi.patch
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File 5bdc31d5-VMX-fix-vmx_handle_eoi.patch of Package xen.10697
References: bsc#1108940 # Commit 45cb9a4123b5550eb1f84846fe5482acae1c13a3 # Date 2018-11-02 12:15:33 +0100 # Author Jan Beulich <jbeulich@suse.com> # Committer Jan Beulich <jbeulich@suse.com> VMX: fix vmx_handle_eoi() In commit 303066fdb1e ("VMX: fix interaction of APIC-V and Viridian emulation") I screwed up: Instead of clearing SVI, other ISR bits should be taken into account. Introduce a new helper set_svi(), split out of vmx_process_isr(), and use it also from vmx_handle_eoi(). Following the problems in vmx_intr_assist() (see the still present big block of debugging code there) also warn (once) if EOI'd vector and original SVI don't match. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Chao Gao <chao.gao@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com> --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -419,7 +419,7 @@ void vlapic_EOI_set(struct vlapic *vlapi vlapic_clear_vector(vector, &vlapic->regs->data[APIC_ISR]); if ( hvm_funcs.handle_eoi ) - hvm_funcs.handle_eoi(vector); + hvm_funcs.handle_eoi(vector, vlapic_find_highest_isr(vlapic)); if ( vlapic_test_vector(vector, &vlapic->regs->data[APIC_TMR]) ) vioapic_update_EOI(vlapic_domain(vlapic), vector); --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1609,17 +1609,14 @@ static int vmx_virtual_intr_delivery_ena return cpu_has_vmx_virtual_intr_delivery; } -static void vmx_process_isr(int isr, struct vcpu *v) +static u8 set_svi(int isr) { unsigned long status; u8 old; - unsigned int i; - const struct vlapic *vlapic = vcpu_vlapic(v); if ( isr < 0 ) isr = 0; - vmx_vmcs_enter(v); __vmread(GUEST_INTR_STATUS, &status); old = status >> VMX_GUEST_INTR_STATUS_SVI_OFFSET; if ( isr != old ) @@ -1629,6 +1626,18 @@ static void vmx_process_isr(int isr, str __vmwrite(GUEST_INTR_STATUS, status); } + return old; +} + +static void vmx_process_isr(int isr, struct vcpu *v) +{ + unsigned int i; + const struct vlapic *vlapic = vcpu_vlapic(v); + + vmx_vmcs_enter(v); + + set_svi(isr); + /* * Theoretically, only level triggered interrupts can have their * corresponding bits set in the eoi exit bitmap. That is, the bits @@ -1707,14 +1716,13 @@ static void vmx_sync_pir_to_irr(struct v vlapic_set_vector(i, &vlapic->regs->data[APIC_IRR]); } -static void vmx_handle_eoi(u8 vector) +static void vmx_handle_eoi(uint8_t vector, int isr) { - unsigned long status; + uint8_t old_svi = set_svi(isr); + static bool_t warned; - /* We need to clear the SVI field. */ - __vmread(GUEST_INTR_STATUS, &status); - status &= VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK; - __vmwrite(GUEST_INTR_STATUS, status); + if ( vector != old_svi && !test_and_set_bool(warned) ) + printk(XENLOG_WARNING "EOI for %02x but SVI=%02x\n", vector, old_svi); } static struct hvm_function_table __initdata vmx_function_table = { --- a/xen/include/asm-x86/hvm/hvm.h +++ b/xen/include/asm-x86/hvm/hvm.h @@ -193,7 +193,7 @@ struct hvm_function_table { void (*process_isr)(int isr, struct vcpu *v); void (*deliver_posted_intr)(struct vcpu *v, u8 vector); void (*sync_pir_to_irr)(struct vcpu *v); - void (*handle_eoi)(u8 vector); + void (*handle_eoi)(uint8_t vector, int isr); /*Walk nested p2m */ int (*nhvm_hap_walk_L1_p2m)(struct vcpu *v, paddr_t L2_gpa,
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