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SUSE:SLE-12:Update
xen.8005
591203b4-x86-pv-align-rsp-before-pushing-failsa...
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File 591203b4-x86-pv-align-rsp-before-pushing-failsafe-frame.patch of Package xen.8005
# Commit cbcaccb5e991155a4ae85a032e990614c3dc6960 # Date 2017-05-09 19:00:20 +0100 # Author Andrew Cooper <andrew.cooper3@citrix.com> # Committer Andrew Cooper <andrew.cooper3@citrix.com> x86/pv: Align %rsp before pushing the failsafe stack frame Architecturally, all 64bit stacks are aligned on a 16 byte boundary before an exception frame is pushed. The failsafe frame should not special in this regard. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -1195,9 +1195,8 @@ static void load_segments(struct vcpu *n struct pv_vcpu *pv = &n->arch.pv_vcpu; struct cpu_user_regs *regs = guest_cpu_user_regs(); unsigned long *rsp = - (n->arch.flags & TF_kernel_mode) ? - (unsigned long *)regs->rsp : - (unsigned long *)pv->kernel_sp; + (unsigned long *)(((n->arch.flags & TF_kernel_mode) + ? regs->rsp : pv->kernel_sp) & ~0xf); unsigned long cs_and_mask, rflags; if ( is_pv_32on64_domain(n->domain) )
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