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SUSE:SLE-12:Update
xen.8005
5b02c786-x86-msr-virtualise-SPEC_CTRL-SSBD.patch
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File 5b02c786-x86-msr-virtualise-SPEC_CTRL-SSBD.patch of Package xen.8005
# Commit cd53023df952cf0084be9ee3d15a90f8837049c2 # Date 2018-05-21 14:20:06 +0100 # Author Andrew Cooper <andrew.cooper3@citrix.com> # Committer Andrew Cooper <andrew.cooper3@citrix.com> x86/msr: Virtualise MSR_SPEC_CTRL.SSBD for guests to use Almost all infrastructure is already in place. Update the reserved bits calculation in guest_wrmsr(). Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -1360,7 +1360,8 @@ long arch_do_domctl( * ignored) when STIBP isn't enumerated in hardware. */ - if ( msr.value & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP) ) + if ( msr.value & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP | + (boot_cpu_has(X86_FEATURE_SSBD) ? SPEC_CTRL_SSBD : 0)) ) break; v->arch.spec_ctrl = msr.value; continue; --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3548,7 +3548,9 @@ int hvm_msr_write_intercept(unsigned int * when STIBP isn't enumerated in hardware. */ - if ( msr_content & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP) ) + if ( msr_content & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP | + (edx & cpufeat_mask(X86_FEATURE_SSBD) + ? SPEC_CTRL_SSBD : 0)) ) goto gp_fault; /* Rsvd bit set? */ v->arch.spec_ctrl = msr_content; --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -2603,7 +2603,9 @@ static int emulate_privileged_op(struct * when STIBP isn't enumerated in hardware. */ - if ( msr_content & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP) ) + if ( msr_content & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP | + (edx & cpufeat_mask(X86_FEATURE_SSBD) + ? SPEC_CTRL_SSBD : 0)) ) goto fail; /* Rsvd bit set? */ v->arch.spec_ctrl = eax;
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