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SUSE:SLE-15-SP1:Update
qemu-testsuite.30219
0248-softmmu-Always-initialize-xlat-in-a.patch
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File 0248-softmmu-Always-initialize-xlat-in-a.patch of Package qemu-testsuite.30219
From: Richard Henderson <richard.henderson@linaro.org> Date: Tue, 21 Jun 2022 08:38:29 -0700 Subject: softmmu: Always initialize xlat in address_space_translate_for_iotlb Git-commit: 418ade7849ce7641c0f7333718caf5091a02fd4c References: bsc#1201367, CVE-2022-35414 The bug is an uninitialized memory read, along the translate_fail path, which results in garbage being read from iotlb_to_section, which can lead to a crash in io_readx/io_writex. The bug may be fixed by writing any value with zero in ~TARGET_PAGE_MASK, so that the call to iotlb_to_section using the xlat'ed address returns io_mem_unassigned, as desired by the translate_fail path. It is most useful to record the original physical page address, which will eventually be logged by memory_region_access_valid when the access is rejected by unassigned_mem_accepts. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1065 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220621153829.366423-1-richard.henderson@linaro.org> Signed-off-by: Dario Faggioli <dfaggioli@suse.com> --- exec.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/exec.c b/exec.c index 9fa5aa871ea13048b395b7269b54..062a8882ea48fef2d44f7a26b09a 100644 --- a/exec.c +++ b/exec.c @@ -714,7 +714,7 @@ static void tcg_iommu_free_notifier_list(CPUState *cpu) /* Called from RCU critical section */ MemoryRegionSection * -address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, +address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr orig_addr, hwaddr *xlat, hwaddr *plen, MemTxAttrs attrs, int *prot) { @@ -723,6 +723,7 @@ address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, IOMMUMemoryRegionClass *imrc; IOMMUTLBEntry iotlb; int iommu_idx; + hwaddr addr = orig_addr; AddressSpaceDispatch *d = atomic_rcu_read(&cpu->cpu_ases[asidx].memory_dispatch); for (;;) { @@ -766,6 +767,16 @@ address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, return section; translate_fail: + /* + * We should be given a page-aligned address -- certainly + * tlb_set_page_with_attrs() does so. The page offset of xlat + * is used to index sections[], and PHYS_SECTION_UNASSIGNED = 0. + * The page portion of xlat will be logged by memory_region_access_valid() + * when this memory access is rejected, so use the original untranslated + * physical address. + */ + assert((orig_addr & ~TARGET_PAGE_MASK) == 0); + *xlat = orig_addr; return &d->map.sections[PHYS_SECTION_UNASSIGNED]; } #endif
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