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SUSE:SLE-15-SP1:Update
xen
600ab341-x86-vioapic-EOI-check-IRR-before-injec...
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File 600ab341-x86-vioapic-EOI-check-IRR-before-inject.patch of Package xen
# Commit ba584fb1a26c058ebd0e6a2779287b3e4400415c # Date 2021-01-22 12:13:05 +0100 # Author Roger Pau Monné <roger.pau@citrix.com> # Committer Jan Beulich <jbeulich@suse.com> x86/vioapic: check IRR before attempting to inject interrupt after EOI In vioapic_update_EOI the irq_lock will be dropped in order to forward the EOI to the dpci handler, so there's a window between clearing IRR and checking if the line is asserted where IRR can change behind our back. Fix this by checking whether IRR is set before attempting to inject a new interrupt. Fixes: 06e3f8f2766 ('vt-d: Do dpci eoi outside of irq_lock.') Signed-off-by: Roger Pau Monné <roger.pau@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/hvm/vioapic.c +++ b/xen/arch/x86/hvm/vioapic.c @@ -544,7 +544,7 @@ void vioapic_update_EOI(struct domain *d } if ( (ent->fields.trig_mode == VIOAPIC_LEVEL_TRIG) && - !ent->fields.mask && + !ent->fields.mask && !ent->fields.remote_irr && hvm_irq->gsi_assert_count[vioapic->base_gsi + pin] ) { ent->fields.remote_irr = 1;
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