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SUSE:SLE-15-SP2:Update
qemu.22427
gcc10-maybe-uninitialized.patch
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File gcc10-maybe-uninitialized.patch of Package qemu.22427
From: Bruce Rogers <brogers@suse.com> Date: Wed, 22 Apr 2020 08:50:55 -0600 Subject: gcc10: maybe-uninitialized MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit References: boo#1169728 gcc 10 needs some help to understand that indeed cpu_irqs[0] does get initialized in all cases. In this case an assert is sufficient. Reported-by: Martin Liška <mliska@suse.cz> Signed-off-by: Bruce Rogers <brogers@suse.com> --- hw/openrisc/openrisc_sim.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index 79e70493fc77e50556a4a92a4231..bc4b71059ff6d922e3cdc83bfc79 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -134,6 +134,7 @@ static void openrisc_sim_init(MachineState *machine) int n; unsigned int smp_cpus = machine->smp.cpus; + assert(smp_cpus >= 1 && smp_cpus <= 2); for (n = 0; n < smp_cpus; n++) { cpu = OPENRISC_CPU(cpu_create(machine->cpu_type)); if (cpu == NULL) {
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