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SUSE:SLE-15-SP2:Update
xen
xsa435-0-39.patch
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File xsa435-0-39.patch of Package xen
From bbb289f3d5bdd3358af748d7c567343532ac45b5 Mon Sep 17 00:00:00 2001 From: Andrew Cooper <andrew.cooper3@citrix.com> Date: Fri, 12 May 2023 15:53:35 +0100 Subject: x86/boot: Expose MSR_ARCH_CAPS data in guest max policies We already have common and default feature adjustment helpers. Introduce one for max featuresets too. Offer MSR_ARCH_CAPS unconditionally in the max policy, and stop clobbering the data inherited from the Host policy. This will be necessary to level a VM safely for migration. Annotate the ARCH_CAPS CPUID bit as special. Note: ARCH_CAPS is still max-only for now, so will not be inhereted by the default policies. With this done, the special case for dom0 can be shrunk to just resampling the Host policy (as ARCH_CAPS isn't visible by default yet). Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -447,8 +447,6 @@ static void __init calculate_pv_max_poli recalculate_xstate(p); p->extd.raw[0xa] = EMPTY_LEAF; /* No SVM for PV guests. */ - - p->arch_caps.raw = 0; /* Not supported yet. */ } static void __init calculate_hvm_max_policy(void) @@ -513,8 +511,6 @@ static void __init calculate_hvm_max_pol /* It's always possible to emulate CPUID faulting for HVM guests */ p->platform_info.cpuid_faulting = true; - - p->arch_caps.raw = 0; /* Not supported yet. */ } void __init init_guest_cpu_policies(void) @@ -634,6 +630,22 @@ void recalculate_cpuid_policy(struct dom __set_bit(X86_FEATURE_RTM, max_fs); } + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + { + /* + * MSR_ARCH_CAPS is just feature data, and we can offer it to guests + * unconditionally, although limit it to Intel systems as it is highly + * uarch-specific. + * + * In particular, the RSBA and RRSBA bits mean "you might migrate to a + * system where RSB underflow uses alternative predictors (a.k.a + * Retpoline not safe)", so these need to be visible to a guest in all + * cases, even when it's only some other server in the pool which + * suffers the identified behaviour. + */ + __set_bit(X86_FEATURE_ARCH_CAPS, fs); + } + /* Clamp the toolstacks choices to reality. */ for ( i = 0; i < ARRAY_SIZE(fs); i++ ) fs[i] &= max_fs[i]; @@ -712,7 +724,10 @@ void __init init_dom0_cpuid_policy(struc * domain policy logic gains a better understanding of MSRs. */ if ( is_hardware_domain(d) && cpu_has_arch_caps ) + { p->feat.arch_caps = true; + p->arch_caps.raw = host_cpu_policy.arch_caps.raw; + } /* Apply dom0-cpuid= command line settings, if provided. */ if ( dom0_cpuid_cmdline ) @@ -742,20 +757,6 @@ void __init init_dom0_cpuid_policy(struc p->platform_info.cpuid_faulting = false; recalculate_cpuid_policy(d); - - if ( is_hardware_domain(d) && cpu_has_arch_caps ) - { - uint64_t val; - - rdmsrl(MSR_ARCH_CAPABILITIES, val); - - p->arch_caps.raw = val & - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | - ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | - ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | - ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO); - } } static void __init __maybe_unused build_assertions(void)
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