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SUSE:SLE-15-SP3:Update
qemu.20747
target-arm-Update-PFIRST-PNEXT-for-pred_.patch
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File target-arm-Update-PFIRST-PNEXT-for-pred_.patch of Package qemu.20747
From: Richard Henderson <richard.henderson@linaro.org> Date: Tue, 12 Jan 2021 20:26:48 -1000 Subject: target/arm: Update PFIRST, PNEXT for pred_desc Git-commit: 86300b5d044064046395ae8ed605cc19e63f2a7c These two were odd, in that do_pfirst_pnext passed the count of 64-bit words rather than bytes. Change to pass the standard pred_full_reg_size to avoid confusion. Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210113062650.593824-3-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bruce Rogers <brogers@suse.com> --- target/arm/sve_helper.c | 7 ++++--- target/arm/translate-sve.c | 6 +++--- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index 5f037c3a8f8cbc6c093433703153..ff01851bf288009ec3e7585b8e03 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -889,8 +889,9 @@ static intptr_t last_active_element(uint64_t *g, intptr_t words, intptr_t esz) return (intptr_t)-1 << esz; } -uint32_t HELPER(sve_pfirst)(void *vd, void *vg, uint32_t words) +uint32_t HELPER(sve_pfirst)(void *vd, void *vg, uint32_t pred_desc) { + intptr_t words = DIV_ROUND_UP(FIELD_EX32(pred_desc, PREDDESC, OPRSZ), 8); uint32_t flags = PREDTEST_INIT; uint64_t *d = vd, *g = vg; intptr_t i = 0; @@ -914,8 +915,8 @@ uint32_t HELPER(sve_pfirst)(void *vd, void *vg, uint32_t words) uint32_t HELPER(sve_pnext)(void *vd, void *vg, uint32_t pred_desc) { - intptr_t words = extract32(pred_desc, 0, SIMD_OPRSZ_BITS); - intptr_t esz = extract32(pred_desc, SIMD_DATA_SHIFT, 2); + intptr_t words = DIV_ROUND_UP(FIELD_EX32(pred_desc, PREDDESC, OPRSZ), 8); + intptr_t esz = FIELD_EX32(pred_desc, PREDDESC, ESZ); uint32_t flags = PREDTEST_INIT; uint64_t *d = vd, *g = vg, esz_mask; intptr_t i, next; diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 0c3a6d21210404a1340e58c9a021..efcb646f729b1dbe4f7989e2fb9d 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -1494,10 +1494,10 @@ static bool do_pfirst_pnext(DisasContext *s, arg_rr_esz *a, TCGv_ptr t_pd = tcg_temp_new_ptr(); TCGv_ptr t_pg = tcg_temp_new_ptr(); TCGv_i32 t; - unsigned desc; + unsigned desc = 0; - desc = DIV_ROUND_UP(pred_full_reg_size(s), 8); - desc = deposit32(desc, SIMD_DATA_SHIFT, 2, a->esz); + desc = FIELD_DP32(desc, PREDDESC, OPRSZ, pred_full_reg_size(s)); + desc = FIELD_DP32(desc, PREDDESC, ESZ, a->esz); tcg_gen_addi_ptr(t_pd, cpu_env, pred_full_reg_offset(s, a->rd)); tcg_gen_addi_ptr(t_pg, cpu_env, pred_full_reg_offset(s, a->rn));
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