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SUSE:SLE-15-SP4:Update
qemu-linux-user
0102-target-i386-Add-pschange-mc-no-feat.patch
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File 0102-target-i386-Add-pschange-mc-no-feat.patch of Package qemu-linux-user
From: Bruce Rogers <brogers@suse.com> Date: Mon, 4 Nov 2019 11:25:46 -0700 Subject: target/i386: Add pschange-mc-no feature Add cpu feature bit for machine check error avoidance on page size change (aka IFU issue). This is required to disable ITLB multihit mitigations in nested hypervisors. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [BR: BSC#1155812 CVE-2018-12207] Signed-off-by: Bruce Rogers <brogers@suse.com> --- target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 0663529b597335a8611962aba875..df2b5a545401fc6fb1c5a7c95854 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1145,7 +1145,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { .type = MSR_FEATURE_WORD, .feat_names = { "rdctl-no", "ibrs-all", "rsba", "skip-l1dfl-vmentry", - "ssb-no", "mds-no", NULL, NULL, + "ssb-no", "mds-no", "pschange-mc-no", NULL, "taa-no", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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