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SUSE:SLE-15-SP7:GA
qemu.22427
i386-Add-MSR-feature-bit-for-MDS-NO.patch
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File i386-Add-MSR-feature-bit-for-MDS-NO.patch of Package qemu.22427
From: Cathy Zhang <cathy.zhang@intel.com> Date: Tue, 22 Oct 2019 15:35:26 +0800 Subject: i386: Add MSR feature bit for MDS-NO Git-commit: 77b168d221191156c47fcd8d1c47329dfdb9439e References: jsc#SLE-7923 Define MSR_ARCH_CAP_MDS_NO in the IA32_ARCH_CAPABILITIES MSR to allow CPU models to report the feature when host supports it. Signed-off-by: Cathy Zhang <cathy.zhang@intel.com> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Tao Xu <tao3.xu@intel.com> Message-Id: <1571729728-23284-2-git-send-email-cathy.zhang@intel.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Bruce Rogers <brogers@suse.com> --- target/i386/cpu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index cde2a16b941adeb1123d5d7411f3..39d37e12256069b92c7998590849 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -838,6 +838,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; #define MSR_ARCH_CAP_RSBA (1U << 2) #define MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY (1U << 3) #define MSR_ARCH_CAP_SSB_NO (1U << 4) +#define MSR_ARCH_CAP_MDS_NO (1U << 5) #define MSR_CORE_CAP_SPLIT_LOCK_DETECT (1U << 5)
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