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SUSE:SLE-15-SP7:GA
xen.14764
5e1da013-IRQ-u16-is-too-narrow-for-evtchn.patch
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File 5e1da013-IRQ-u16-is-too-narrow-for-evtchn.patch of Package xen.14764
# Commit 892b9dcebdb7f646657e11cfdd95a385107bbefa # Date 2020-01-14 12:03:47 +0100 # Author Jan Beulich <jbeulich@suse.com> # Committer Jan Beulich <jbeulich@suse.com> IRQ: u16 is too narrow for an event channel number FIFO event channels allow ports up to 2^17, so we need to use a wider field in struct pirq. Move "masked" such that it may share the 8-byte slot with struct arch_pirq on 64-bit arches, rather than leaving a 7-byte hole in all cases. Take the opportunity and also add a comment regarding "arch" placement within the structure. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com> # Commit b4194711ffaffa5e63d986338fb8d4020fa6bad1 # Date 2020-01-14 16:06:27 +0100 # Author Jan Beulich <jbeulich@suse.com> # Committer Jan Beulich <jbeulich@suse.com> Arm: fix build after 892b9dcebdb7 "IRQ: u16 is too narrow for an event channel number" introduced a use of evetchn_port_t, but its typedef apparently surfaces indirectly here only on x86. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com> --- a/xen/include/xen/irq.h +++ b/xen/include/xen/irq.h @@ -8,6 +8,7 @@ #include <xen/list.h> #include <asm/regs.h> #include <asm/hardirq.h> +#include <public/event_channel.h> struct irqaction { void (*handler)(int, void *, struct cpu_user_regs *); @@ -127,9 +128,10 @@ struct vcpu; struct pirq { int pirq; - u16 evtchn; - bool_t masked; + evtchn_port_t evtchn; struct rcu_head rcu_head; + bool masked; + /* Architectures may require this field to be last. */ struct arch_pirq arch; };
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