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SUSE:SLE-15-SP7:Update
Mesa.34968
n_no-sse2-on-ix86-except-for-intel-drivers.patch
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File n_no-sse2-on-ix86-except-for-intel-drivers.patch of Package Mesa.34968
Index: mesa-22.2.0/meson.build =================================================================== --- mesa-22.2.0.orig/meson.build +++ mesa-22.2.0/meson.build @@ -1275,35 +1275,8 @@ if host_machine.system() == 'windows' endif endif -if host_machine.cpu_family().startswith('x86') and cc.get_argument_syntax() != 'msvc' - pre_args += '-DUSE_SSE41' - with_sse41 = true - sse41_args = ['-msse4.1'] - - if host_machine.cpu_family() == 'x86' - if get_option('sse2') - # These settings make generated GCC code match MSVC and follow - # GCC advice on https://gcc.gnu.org/wiki/FloatingPointMath#x86note - # - # NOTE: We need to ensure stack is realigned given that we - # produce shared objects, and have no control over the stack - # alignment policy of the application. Therefore we need - # -mstackrealign or -mincoming-stack-boundary=2. - # - # XXX: We could have SSE without -mstackrealign if we always used - # __attribute__((force_align_arg_pointer)), but that's not - # always the case. - c_args += ['-msse2', '-mfpmath=sse', '-mstackrealign'] - else - # GCC on x86 (not x86_64) with -msse* assumes a 16 byte aligned stack, but - # that's not guaranteed - sse41_args += '-mstackrealign' - endif - endif -else - with_sse41 = false - sse41_args = [] -endif +with_sse41 = false +sse41_args = [] # Check for GCC style atomics dep_atomic = null_dep
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