File libglvnd-add-bti.patch of Package libglvnd

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File libglvnd-add-bti.patch of Package libglvnd (Revision 4d364b84e778d24d10bde566b59a1587)

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From 7107f739398cd96600b039fd748cb1c4822bb400 Mon Sep 17 00:00:00 2001
From: Guillaume Gardet <guillaume.gardet@arm.com>
Date: Fri, 21 Jan 2022 09:26:07 +0100
Subject: [PATCH] Add BTI landing pads for aarch64

When Branch Target Identifier (BTI) is enabled on aarch64,
any software which run libglvnd will fail with SIGILL, Illegal instruction.
This is because some assembler code misses the BTI landing pads.
See: https://developer.arm.com/documentation/102433/0100/Jump-oriented-programming

"hint #34" is the same thing as "BTI C" landing pad, but keep
compatibility with systems without BTI enabled.
---
 src/GLX/glvnd_genentry.c                     | 1 +
 src/GLdispatch/vnd-glapi/entry_aarch64_tsd.c | 1 +
 2 files changed, 2 insertions(+)

diff --git a/src/GLX/glvnd_genentry.c b/src/GLX/glvnd_genentry.c
index 7bbe811..b82aa14 100644
--- a/src/GLX/glvnd_genentry.c
+++ b/src/GLX/glvnd_genentry.c
@@ -90,6 +90,7 @@ extern char glx_entrypoint_end[];
 
 #define STUB_SIZE 16
 #define STUB_ASM_ARCH(slot) \
+    "hint #34\n" \
     "adrp x16, entrypointFunctions + " slot "*8\n" \
     "ldr x16, [x16, #:lo12:(entrypointFunctions + " slot "*8)]\n" \
     "br x16\n"
diff --git a/src/GLdispatch/vnd-glapi/entry_aarch64_tsd.c b/src/GLdispatch/vnd-glapi/entry_aarch64_tsd.c
index ae80131..a4652e0 100644
--- a/src/GLdispatch/vnd-glapi/entry_aarch64_tsd.c
+++ b/src/GLdispatch/vnd-glapi/entry_aarch64_tsd.c
@@ -69,6 +69,7 @@
  * table then does a branch without link to the function address.
  */
 #define STUB_ASM_CODE(slot)                           \
+    "hint #34\n\t"                                    \
     "stp x1, x0, [sp, #-16]!\n\t"                     \
     "adrp x0, :got:_glapi_Current\n\t"                \
     "ldr x0, [x0, #:got_lo12:_glapi_Current]\n\t"     \
-- 
2.35.1

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File libglvnd-add-bti.patch of Package libglvnd (Revision 4d364b84e778d24d10bde566b59a1587)

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