File ppc-mcount.patch of Package glibc-testsuite

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File ppc-mcount.patch of Package glibc-testsuite

Index: glibc-2.18/sysdeps/powerpc/powerpc32/ppc-mcount.S
===================================================================
--- glibc-2.18.orig/sysdeps/powerpc/powerpc32/ppc-mcount.S
+++ glibc-2.18/sysdeps/powerpc/powerpc32/ppc-mcount.S
@@ -40,22 +40,38 @@
 */
 
 ENTRY(_mcount)
+#if defined PIC && !defined SHARED
+# define CALLER_LR_OFF 68
+	stwu	r1,-64(r1)
+	cfi_adjust_cfa_offset (64)
+	stw	r30, 48(r1)
+	cfi_rel_offset (r30, 48)
+#else
+# define CALLER_LR_OFF 52
 	stwu	r1,-48(r1)
 	cfi_adjust_cfa_offset (48)
+#endif
 /* We need to save the parameter-passing registers.  */
 	stw	r3, 12(r1)
 	stw	r4, 16(r1)
 	stw	r5, 20(r1)
 	stw	r6, 24(r1)
 	mflr	r4
-	lwz	r3, 52(r1)
+#if defined PIC && !defined SHARED
+	bcl	20,31,0f
+0:
+	mflr	r30
+	addis	r30, r30, _GLOBAL_OFFSET_TABLE_-0b@ha
+	addi	r30, r30, _GLOBAL_OFFSET_TABLE_-0b@l
+#endif
+	lwz	r3, CALLER_LR_OFF(r1)
 	mfcr	r5
 	stw	r7, 28(r1)
 	stw	r8, 32(r1)
 	stw	r9, 36(r1)
 	stw	r10,40(r1)
 	stw	r4, 44(r1)
-	cfi_offset (lr, -4)
+	cfi_rel_offset (lr, 44)
 	stw	r5,  8(r1)
 #ifndef SHARED
 	bl	JUMPTARGET(__mcount_internal)
@@ -71,13 +87,18 @@ ENTRY(_mcount)
 	mtcrf	0xff,r6
 	lwz	r5, 20(r1)
 	lwz	r6, 24(r1)
-	lwz	r0, 52(r1)
+	lwz	r0, CALLER_LR_OFF(r1)
 	lwz	r7, 28(r1)
 	lwz	r8, 32(r1)
 	mtlr	r0
 	lwz	r9, 36(r1)
 	lwz	r10,40(r1)
  /* ...unwind the stack frame, and return to your usual programming.  */
+#if defined PIC && !defined SHARED
+	lwz	r30, 48(r1)
+	addi	r1,r1,64
+#else
 	addi	r1,r1,48
+#endif
 	bctr
 END(_mcount)

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File ppc-mcount.patch of Package glibc-testsuite

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