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home:bmwiedemann:reproducible:distribution:ring1
xen
662a6a4c-x86-spec-reporting-of-BHB-clearing.patch
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File 662a6a4c-x86-spec-reporting-of-BHB-clearing.patch of Package xen
# Commit 049ab0b2c9f1f5edb54b505fef0bc575787dafe9 # Date 2024-04-25 16:35:56 +0200 # Author Roger Pau Monné <roger.pau@citrix.com> # Committer Jan Beulich <jbeulich@suse.com> x86/spec: fix reporting of BHB clearing usage from guest entry points Reporting whether the BHB clearing on entry is done for the different domains types based on cpu_has_bhb_seq is unhelpful, as that variable signals whether there's a BHB clearing sequence selected, but that alone doesn't imply that such sequence is used from the PV and/or HVM entry points. Instead use opt_bhb_entry_{pv,hvm} which do signal whether BHB clearing is performed on entry from PV/HVM. Fixes: 689ad48ce9cf ('x86/spec-ctrl: Wire up the Native-BHI software sequences') Signed-off-by: Roger Pau Monné <roger.pau@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -634,7 +634,7 @@ static void __init print_details(enum in (boot_cpu_has(X86_FEATURE_SC_MSR_HVM) || boot_cpu_has(X86_FEATURE_SC_RSB_HVM) || boot_cpu_has(X86_FEATURE_IBPB_ENTRY_HVM) || - cpu_has_bhb_seq || amd_virt_spec_ctrl || + opt_bhb_entry_hvm || amd_virt_spec_ctrl || opt_eager_fpu || opt_verw_hvm) ? "" : " None", boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ? " MSR_SPEC_CTRL" : "", (boot_cpu_has(X86_FEATURE_SC_MSR_HVM) || @@ -643,7 +643,7 @@ static void __init print_details(enum in opt_eager_fpu ? " EAGER_FPU" : "", opt_verw_hvm ? " VERW" : "", boot_cpu_has(X86_FEATURE_IBPB_ENTRY_HVM) ? " IBPB-entry" : "", - cpu_has_bhb_seq ? " BHB-entry" : ""); + opt_bhb_entry_hvm ? " BHB-entry" : ""); #endif #ifdef CONFIG_PV @@ -651,14 +651,14 @@ static void __init print_details(enum in (boot_cpu_has(X86_FEATURE_SC_MSR_PV) || boot_cpu_has(X86_FEATURE_SC_RSB_PV) || boot_cpu_has(X86_FEATURE_IBPB_ENTRY_PV) || - cpu_has_bhb_seq || + opt_bhb_entry_pv || opt_eager_fpu || opt_verw_pv) ? "" : " None", boot_cpu_has(X86_FEATURE_SC_MSR_PV) ? " MSR_SPEC_CTRL" : "", boot_cpu_has(X86_FEATURE_SC_RSB_PV) ? " RSB" : "", opt_eager_fpu ? " EAGER_FPU" : "", opt_verw_pv ? " VERW" : "", boot_cpu_has(X86_FEATURE_IBPB_ENTRY_PV) ? " IBPB-entry" : "", - cpu_has_bhb_seq ? " BHB-entry" : ""); + opt_bhb_entry_pv ? " BHB-entry" : ""); printk(" XPTI (64-bit PV only): Dom0 %s, DomU %s (with%s PCID)\n", opt_xpti_hwdom ? "enabled" : "disabled",
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