Sign Up
Log In
Log In
or
Sign Up
Places
All Projects
Status Monitor
Collapse sidebar
openSUSE:12.2
gcc41
barcelona.patch
Overview
Repositories
Revisions
Requests
Users
Attributes
Meta
File barcelona.patch of Package gcc41
Index: gcc/config/i386/i386.c =================================================================== --- gcc/config/i386/i386.c.orig 2009-11-20 13:42:58.000000000 +0100 +++ gcc/config/i386/i386.c 2009-11-20 13:43:00.000000000 +0100 @@ -1650,6 +1650,10 @@ override_options (void) {"amdfam10", PROCESSOR_AMDFAM10, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW | PTA_64BIT | PTA_3DNOW_A | PTA_SSE | PTA_SSE2| PTA_SSE3 | PTA_SSE4A | PTA_POPCNT | PTA_ABM}, + {"barcelona", PROCESSOR_AMDFAM10, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW + | PTA_64BIT | PTA_3DNOW_A | PTA_SSE + | PTA_SSE2 | PTA_SSE3 | PTA_POPCNT + | PTA_ABM | PTA_SSE4A}, }; int const pta_size = ARRAY_SIZE (processor_alias_table); Index: gcc/config.gcc =================================================================== --- gcc/config.gcc.orig 2009-11-20 13:42:43.000000000 +0100 +++ gcc/config.gcc 2009-11-20 13:43:00.000000000 +0100 @@ -2396,7 +2396,7 @@ if test x$with_cpu = x ; then ;; i686-*-* | i786-*-*) case ${target_noncanonical} in - amdfam10-*) + amdfam10-*|barcelona-*) with_cpu=amdfam10 ;; k8-*|opteron-*|athlon_64-*) @@ -2436,7 +2436,7 @@ if test x$with_cpu = x ; then ;; x86_64-*-*) case ${target_noncanonical} in - amdfam10-*) + amdfam10-*|barcelona-*) with_cpu=amdfam10 ;; k8-*|opteron-*|athlon_64-*) @@ -2668,7 +2668,7 @@ case "${target}" in esac # OK ;; - "" | k8 | opteron | athlon64 | athlon-fx | nocona | generic | amdfam10 ) + "" | k8 | opteron | athlon64 | athlon-fx | nocona | generic | amdfam10 | barcelona ) # OK ;; *) Index: gcc/doc/invoke.texi =================================================================== --- gcc/doc/invoke.texi.orig 2009-11-20 13:42:55.000000000 +0100 +++ gcc/doc/invoke.texi 2009-11-20 13:43:00.000000000 +0100 @@ -9073,7 +9073,7 @@ instruction set support. @item k8, opteron, athlon64, athlon-fx AMD K8 core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.) -@item amdfam10 +@item amdfam10, barcelona AMD Family 10 core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, SSE4A, 3dNOW!, enhanced 3dNOW!, ABM and 64-bit instruction set extensions.)
Locations
Projects
Search
Status Monitor
Help
OpenBuildService.org
Documentation
API Documentation
Code of Conduct
Contact
Support
@OBShq
Terms
openSUSE Build Service is sponsored by
The Open Build Service is an
openSUSE project
.
Sign Up
Log In
Places
Places
All Projects
Status Monitor