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openSUSE:12.2:ARM
gcc43
s390-improve-loadfpzero
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File s390-improve-loadfpzero of Package gcc43
Index: gcc/config/s390/s390.c =================================================================== *** gcc/config/s390/s390.c.orig --- gcc/config/s390/s390.c *************** legitimate_reload_constant_p (rtx op) *** 2803,2808 **** --- 2803,2814 ---- && larl_operand (op, VOIDmode)) return true; + /* Accept floating-point zero operands that fit into a single GPR. */ + if (GET_CODE (op) == CONST_DOUBLE + && s390_float_const_zero_p (op) + && GET_MODE_SIZE (GET_MODE (op)) <= UNITS_PER_WORD) + return true; + /* Accept double-word operands that can be split. */ if (GET_CODE (op) == CONST_INT && trunc_int_for_mode (INTVAL (op), word_mode) != INTVAL (op)) *************** s390_preferred_reload_class (rtx op, enu *** 2826,2840 **** { switch (GET_CODE (op)) { ! /* Constants we cannot reload must be forced into the ! literal pool. */ ! ! case CONST_DOUBLE: ! case CONST_INT: ! if (legitimate_reload_constant_p (op)) ! return class; ! else ! return NO_REGS; /* If a symbolic constant or a PLUS is reloaded, it is most likely being used as an address, so --- 2832,2849 ---- { switch (GET_CODE (op)) { ! /* Constants we cannot reload into general registers ! must be forced into the literal pool. */ ! case CONST_DOUBLE: ! case CONST_INT: ! if (reg_class_subset_p (GENERAL_REGS, class) ! && legitimate_reload_constant_p (op)) ! return GENERAL_REGS; ! else if (reg_class_subset_p (ADDR_REGS, class) ! && legitimate_reload_constant_p (op)) ! return ADDR_REGS; ! else ! return NO_REGS; /* If a symbolic constant or a PLUS is reloaded, it is most likely being used as an address, so Index: gcc/config/s390/s390.md =================================================================== *** gcc/config/s390/s390.md.orig --- gcc/config/s390/s390.md *************** *** 2064,2072 **** (define_insn "*mov<mode>_64dfp" [(set (match_operand:DD_DF 0 "nonimmediate_operand" ! "=f,f,d,f,f,R,T,d, d,RT") (match_operand:DD_DF 1 "general_operand" ! " f,d,f,R,T,f,f,d,RT, d"))] "TARGET_64BIT && TARGET_DFP" "@ ldr\t%0,%1 --- 2064,2072 ---- (define_insn "*mov<mode>_64dfp" [(set (match_operand:DD_DF 0 "nonimmediate_operand" ! "=f,f,d,f,f,R,T,d,d, d,RT") (match_operand:DD_DF 1 "general_operand" ! " f,d,f,R,T,f,f,G,d,RT, d"))] "TARGET_64BIT && TARGET_DFP" "@ ldr\t%0,%1 *************** *** 2076,2093 **** ldy\t%0,%1 std\t%1,%0 stdy\t%1,%0 lgr\t%0,%1 lg\t%0,%1 stg\t%1,%0" ! [(set_attr "op_type" "RR,RRE,RRE,RX,RXY,RX,RXY,RRE,RXY,RXY") (set_attr "type" "floaddf,floaddf,floaddf,floaddf,floaddf, ! fstoredf,fstoredf,lr,load,store") ! (set_attr "z10prop" "*,*,*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_rec") ]) (define_insn "*mov<mode>_64" ! [(set (match_operand:DD_DF 0 "nonimmediate_operand" "=f,f,f,R,T,d, d,RT") ! (match_operand:DD_DF 1 "general_operand" "f,R,T,f,f,d,RT, d"))] "TARGET_64BIT" "@ ldr\t%0,%1 --- 2076,2094 ---- ldy\t%0,%1 std\t%1,%0 stdy\t%1,%0 + lghi\t%0,0 lgr\t%0,%1 lg\t%0,%1 stg\t%1,%0" ! [(set_attr "op_type" "RR,RRE,RRE,RX,RXY,RX,RXY,RI,RRE,RXY,RXY") (set_attr "type" "floaddf,floaddf,floaddf,floaddf,floaddf, ! fstoredf,fstoredf,*,lr,load,store") ! (set_attr "z10prop" "*,*,*,*,*,*,*,z10_fwd_A1,z10_fr_E1,z10_fwd_A3,z10_rec") ]) (define_insn "*mov<mode>_64" ! [(set (match_operand:DD_DF 0 "nonimmediate_operand" "=f,f,f,R,T,d,d, d,RT") ! (match_operand:DD_DF 1 "general_operand" "f,R,T,f,f,G,d,RT, d"))] "TARGET_64BIT" "@ ldr\t%0,%1 *************** *** 2095,2107 **** ldy\t%0,%1 std\t%1,%0 stdy\t%1,%0 lgr\t%0,%1 lg\t%0,%1 stg\t%1,%0" ! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RRE,RXY,RXY") (set_attr "type" "fload<mode>,fload<mode>,fload<mode>, ! fstore<mode>,fstore<mode>,lr,load,store") ! (set_attr "z10prop" "*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_rec")]) (define_insn "*mov<mode>_31" [(set (match_operand:DD_DF 0 "nonimmediate_operand" --- 2096,2109 ---- ldy\t%0,%1 std\t%1,%0 stdy\t%1,%0 + lghi\t%0,0 lgr\t%0,%1 lg\t%0,%1 stg\t%1,%0" ! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RI,RRE,RXY,RXY") (set_attr "type" "fload<mode>,fload<mode>,fload<mode>, ! fstore<mode>,fstore<mode>,*,lr,load,store") ! (set_attr "z10prop" "*,*,*,*,*,z10_fwd_A1,z10_fr_E1,z10_fwd_A3,z10_rec")]) (define_insn "*mov<mode>_31" [(set (match_operand:DD_DF 0 "nonimmediate_operand" *************** *** 2172,2180 **** (define_insn "mov<mode>" [(set (match_operand:SD_SF 0 "nonimmediate_operand" ! "=f,f,f,R,T,d,d,d,R,T") (match_operand:SD_SF 1 "general_operand" ! " f,R,T,f,f,d,R,T,d,d"))] "" "@ ler\t%0,%1 --- 2174,2182 ---- (define_insn "mov<mode>" [(set (match_operand:SD_SF 0 "nonimmediate_operand" ! "=f,f,f,R,T,d,d,d,d,R,T") (match_operand:SD_SF 1 "general_operand" ! " f,R,T,f,f,G,d,R,T,d,d"))] "" "@ ler\t%0,%1 *************** *** 2182,2196 **** ley\t%0,%1 ste\t%1,%0 stey\t%1,%0 lr\t%0,%1 l\t%0,%1 ly\t%0,%1 st\t%1,%0 sty\t%1,%0" ! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY") (set_attr "type" "fload<mode>,fload<mode>,fload<mode>, ! fstore<mode>,fstore<mode>,lr,load,load,store,store") ! (set_attr "z10prop" "*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_fwd_A3,z10_rec,z10_rec")]) ; ; movcc instruction pattern --- 2184,2199 ---- ley\t%0,%1 ste\t%1,%0 stey\t%1,%0 + lhi\t%0,0 lr\t%0,%1 l\t%0,%1 ly\t%0,%1 st\t%1,%0 sty\t%1,%0" ! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RI,RR,RX,RXY,RX,RXY") (set_attr "type" "fload<mode>,fload<mode>,fload<mode>, ! fstore<mode>,fstore<mode>,*,lr,load,load,store,store") ! (set_attr "z10prop" "*,*,*,*,*,z10_fwd_A1,z10_fr_E1,z10_fwd_A3,z10_fwd_A3,z10_rec,z10_rec")]) ; ; movcc instruction pattern
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