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File simhv37.dif of Package simh (Revision 509a73bc3bfaeed5e46a77a84de3ce6d)

Currently displaying revision 509a73bc3bfaeed5e46a77a84de3ce6d , Show latest

diff -wruN ../orig-simhv37/makefile ./makefile
--- ../orig-simhv37/makefile	2007-02-02 07:12:20.000000000 +0100
+++ ./makefile	2007-02-06 14:48:43.000000000 +0100
@@ -10,7 +10,7 @@
 else
 OS_CCDEFS = -D_GNU_SOURCE
 endif
-CC = gcc -std=c99 -O2 -U__STRICT_ANSI__ -g -lm -lrt $(OS_CCDEFS) -I .
+CC = gcc -std=c99 -U__STRICT_ANSI__ $(RPM_OPT_FLAGS) -lm -lrt $(OS_CCDEFS) -I .
 ifeq ($(USE_NETWORK),)
 else
 NETWORK_OPT = -DUSE_NETWORK -isystem /usr/local/include /usr/local/lib/libpcap.a
@@ -308,9 +308,9 @@
 ${BIN}nova${EXE} : ${NOVA} ${SIM}
 	${CC} ${NOVA} ${SIM} ${NOVA_OPT} -o $@ ${LDFLAGS}
 
-eclipse : ${BIN}eclipse${EXE}
+eclipse : ${BIN}simh-eclipse${EXE}
 
-${BIN}eclipse${EXE} : ${ECLIPSE} ${SIM}
+${BIN}simh-eclipse${EXE} : ${ECLIPSE} ${SIM}
 	${CC} ${ECLIPSE} ${SIM} ${ECLIPSE_OPT} -o $@ ${LDFLAGS}
 
 h316 : ${BIN}h316${EXE}
diff -wruN ../orig-simhv37/NOVA/eclipse_cpu.c ./NOVA/eclipse_cpu.c
--- ../orig-simhv37/NOVA/eclipse_cpu.c	2006-06-07 07:04:02.000000000 +0200
+++ ./NOVA/eclipse_cpu.c	2007-02-06 14:49:18.000000000 +0100
@@ -365,7 +365,7 @@
 
 int32 XCT_mode = 0;                                     /* 1 if XCT mode */
 int32 XCT_inst = 0;                                     /* XCT instruction */
-int32 PPC = -1;
+int32 PePeCe = -1;
 
 struct ndev dev_table[64];                              /* dispatch table */
 
@@ -849,14 +849,14 @@
 }
 
 if ((PC < 1 || PC > 077777) && Debug_Flags) {
-    if (PPC != -1) {                                    /* Don't break on 1st instruction */
-        printf("\n<<Invalid PC=%o from %o>>\n\r", PC, PPC);
+    if (PePeCe != -1) {                                    /* Don't break on 1st instruction */
+        printf("\n<<Invalid PC=%o from %o>>\n\r", PC, PePeCe);
         reason = STOP_IBKPT;
         break;
     }    
 }
 
-PPC = PC;
+PePeCe = PC;
 
 if (Debug_Flags) {
     if (!Tron) {
diff -wruN ../orig-simhv37/PDP1/pdp1_cpu.c ./PDP1/pdp1_cpu.c
--- ../orig-simhv37/PDP1/pdp1_cpu.c	2007-01-04 14:27:34.000000000 +0100
+++ ./PDP1/pdp1_cpu.c	2007-02-06 16:09:50.000000000 +0100
@@ -534,7 +534,7 @@
     sbs = sbs & SB_ON;                                  /* yes, only SB ON */
     sbs_lvl = sbs_eval ();                              /* eval SBS system */
     }
-else sbs_lvl = sbs_req = sbs_enb = sbs_lvl = 0;         /* no, clr SBS sys */
+else sbs_req = sbs_enb = sbs_lvl = 0;         /* no, clr SBS sys */
 
 /* Main instruction fetch/decode loop: check events and interrupts */
 
diff -wruN ../orig-simhv37/PDP10/pdp10_cpu.c ./PDP10/pdp10_cpu.c
--- ../orig-simhv37/PDP10/pdp10_cpu.c	2006-12-20 10:28:12.000000000 +0100
+++ ./PDP10/pdp10_cpu.c	2007-02-06 14:50:21.000000000 +0100
@@ -1915,7 +1915,7 @@
 
 /* I/O block transfers - byte to Unibus (0) and Unibus to byte (1) */
 
-#define BYTE1           0776000000000
+#define BYTE1           0776000000000LL
 #define BYTE2           0001774000000
 #define BYTE3           0000003770000
 #define BYTE4           0000000007760
diff -wruN ../orig-simhv37/PDP10/pdp10_defs.h ./PDP10/pdp10_defs.h
--- ../orig-simhv37/PDP10/pdp10_defs.h	2007-02-01 11:24:40.000000000 +0100
+++ ./PDP10/pdp10_defs.h	2007-02-06 14:52:15.000000000 +0100
@@ -126,9 +126,9 @@
 #define UNIT_V_ITS      (UNIT_V_UF)                     /* ITS */
 #define UNIT_V_T20      (UNIT_V_UF + 1)                 /* TOPS-20 */
 #define UNIT_V_KLAD     (UNIT_V_UF + 2)                 /* diagnostics */
-#define UNIT_ITS        (1 << UNIT_V_ITS)
-#define UNIT_T20        (1 << UNIT_V_T20)
-#define UNIT_KLAD       (1 << UNIT_V_KLAD)
+#define UNIT_ITS        (1LL << UNIT_V_ITS)
+#define UNIT_T20        (1LL << UNIT_V_T20)
+#define UNIT_KLAD       (1LL << UNIT_V_KLAD)
 #define Q_T10           ((cpu_unit.flags & (UNIT_ITS|UNIT_T20|UNIT_KLAD)) == 0)
 #define Q_ITS           (cpu_unit.flags & UNIT_ITS)
 #define Q_T20           (cpu_unit.flags & UNIT_T20)
@@ -144,16 +144,16 @@
 #define MEM_ADDR_NXM(x) ((x) >= MEMSIZE)
 #define VASIZE          18                              /* virtual addr width */
 #define AMASK           ((1 << VASIZE) - 1)             /* virtual addr mask */
-#define LMASK           0777777000000                   /* left mask */
-#define LSIGN           0400000000000                   /* left sign */
-#define RMASK           0000000777777                   /* right mask */
-#define RSIGN           0000000400000                   /* right sign */
-#define DMASK           0777777777777                   /* data mask */
-#define SIGN            0400000000000                   /* sign */
-#define MMASK           0377777777777                   /* magnitude mask */
-#define ONES            0777777777777
-#define MAXPOS          0377777777777
-#define MAXNEG          0400000000000
+#define LMASK           0777777000000LL                   /* left mask */
+#define LSIGN           0400000000000LL                   /* left sign */
+#define RMASK           0000000777777LL                   /* right mask */
+#define RSIGN           0000000400000LL                   /* right sign */
+#define DMASK           0777777777777LL                   /* data mask */
+#define SIGN            0400000000000LL                   /* sign */
+#define MMASK           0377777777777LL                   /* magnitude mask */
+#define ONES            0777777777777LL
+#define MAXPOS          0377777777777LL
+#define MAXNEG          0400000000000LL
 
 /* Instruction format */
 
@@ -181,10 +181,10 @@
 
 #define BP_V_P          30                              /* position */
 #define BP_M_P          077
-#define BP_P            0770000000000
+#define BP_P            0770000000000LL
 #define BP_V_S          24                              /* size */
 #define BP_M_S          077
-#define BP_S            0007700000000
+#define BP_S            0007700000000LL
 #define GET_P(x)        ((int32) (((x) >> BP_V_P) & BP_M_P))
 #define GET_S(x)        ((int32) (((x) >> BP_V_S) & BP_M_S))
 #define PUT_P(b,x)      (((b) & ~BP_P) | ((((t_int64) (x)) & BP_M_P) << BP_V_P))
@@ -291,9 +291,9 @@
 #define  T20_IMM         1                              /* immediate */
 #define  T20_SHR         2                              /* shared */
 #define  T20_IND         3                              /* indirect */
-#define PTE_T20_W       0020000000000                   /* T20: writeable */
-#define PTE_T20_C       0004000000000                   /* T20: cacheable */
-#define PTE_T20_STM     0000077000000                   /* T20: storage medium */
+#define PTE_T20_W       0020000000000LL                   /* T20: writeable */
+#define PTE_T20_C       0004000000000LL                   /* T20: cacheable */
+#define PTE_T20_STM     0000077000000LL                   /* T20: storage medium */
 #define PTE_T20_V_PMI   18                              /* page map index */
 #define PTE_T20_M_PMI   0777
 #define T20_GETTYP(x)   ((int32) (((x) >> PTE_T20_V_TYP) & PTE_T20_M_TYP))
@@ -301,27 +301,27 @@
 
 /* CST entry, TOPS-20 paging */
 
-#define CST_AGE         0770000000000                   /* age field */
-#define CST_M           0000000000001                   /* modified */
+#define CST_AGE         0770000000000LL                   /* age field */
+#define CST_M           0000000000001LL                   /* modified */
 
 /* Page fail word, DEC paging */
 
-#define PF_USER         0400000000000                   /* user mode */
-#define PF_HARD         0200000000000                   /* nx I/O reg */
-#define PF_NXM          0370000000000                   /* nx memory */
-#define PF_T10_A        0100000000000                   /* T10: pte A bit */
-#define PF_T10_W        0040000000000                   /* T10: pte W bit */
-#define PF_T10_S        0020000000000                   /* T10: pte S bit */
-#define PF_T20_DN       0100000000000                   /* T20: eval done */
-#define PF_T20_M        0040000000000                   /* T20: modified */
-#define PF_T20_W        0020000000000                   /* T20: writeable */
-#define PF_WRITE        0010000000000                   /* write reference */
-#define PF_PUB          0004000000000                   /* pte public bit */
-#define PF_C            0002000000000                   /* pte C bit */
-#define PF_VIRT         0001000000000                   /* pfl: virt ref */
-#define PF_NXMP         0001000000000                   /* nxm: phys ref */
-#define PF_IO           0000200000000                   /* I/O reference */
-#define PF_BYTE         0000020000000                   /* I/O byte ref */
+#define PF_USER         0400000000000LL                   /* user mode */
+#define PF_HARD         0200000000000LL                   /* nx I/O reg */
+#define PF_NXM          0370000000000LL                   /* nx memory */
+#define PF_T10_A        0100000000000LL                   /* T10: pte A bit */
+#define PF_T10_W        0040000000000LL                   /* T10: pte W bit */
+#define PF_T10_S        0020000000000LL                   /* T10: pte S bit */
+#define PF_T20_DN       0100000000000LL                   /* T20: eval done */
+#define PF_T20_M        0040000000000LL                   /* T20: modified */
+#define PF_T20_W        0020000000000LL                   /* T20: writeable */
+#define PF_WRITE        0010000000000LL                   /* write reference */
+#define PF_PUB          0004000000000LL                   /* pte public bit */
+#define PF_C            0002000000000LL                   /* pte C bit */
+#define PF_VIRT         0001000000000LL                   /* pfl: virt ref */
+#define PF_NXMP         0001000000000LL                   /* nxm: phys ref */
+#define PF_IO           0000200000000LL                   /* I/O reference */
+#define PF_BYTE         0000020000000LL                   /* I/O byte ref */
 
 /* Virtual address, ITS paging */
 
@@ -353,7 +353,7 @@
 
 /* Page fail word, ITS paging */
 
-#define PF_ITS_WRITE    0010000000000                   /* write reference */
+#define PF_ITS_WRITE    0010000000000LL                   /* write reference */
 #define PF_ITS_V_ACC    28                              /* access from PTE */
 
 /* Page table fill operations */
@@ -365,12 +365,12 @@
 
 /* User base register */
 
-#define UBR_SETACB      0400000000000                   /* set AC blocks */
-#define UBR_SETUBR      0100000000000                   /* set UBR */
+#define UBR_SETACB      0400000000000LL                   /* set AC blocks */
+#define UBR_SETUBR      0100000000000LL                   /* set UBR */
 #define UBR_V_CURAC     27                              /* current AC block */
 #define UBR_V_PRVAC     24                              /* previous AC block */
 #define UBR_M_AC        07
-#define UBR_ACBMASK     0007700000000
+#define UBR_ACBMASK     0007700000000LL
 #define UBR_V_UBR       0                               /* user base register */
 #define UBR_N_UBR       11
 #define UBR_M_UBR       03777
@@ -462,10 +462,10 @@
 
 /* Microcode constants */
 
-#define UC_INHCST       0400000000000                   /* inhibit CST update */
-#define UC_UBABLT       0040000000000                   /* BLTBU and BLTUB */
-#define UC_KIPAGE       0020000000000                   /* "KI" paging */
-#define UC_KLPAGE       0010000000000                   /* "KL" paging */
+#define UC_INHCST       0400000000000LL                   /* inhibit CST update */
+#define UC_UBABLT       0040000000000LL                   /* BLTBU and BLTUB */
+#define UC_KIPAGE       0020000000000LL                   /* "KI" paging */
+#define UC_KLPAGE       0010000000000LL                   /* "KL" paging */
 #define UC_VERDEC       (0130 << 18)                    /* ucode version */
 #define UC_VERITS       (262u << 18)
 #define UC_SERDEC       4097                            /* serial number */
diff -wruN ../orig-simhv37/PDP10/pdp10_ksio.c ./PDP10/pdp10_ksio.c
--- ../orig-simhv37/PDP10/pdp10_ksio.c	2006-12-29 11:51:10.000000000 +0100
+++ ./PDP10/pdp10_ksio.c	2007-02-06 14:52:55.000000000 +0100
@@ -499,8 +499,8 @@
         return (lim - ba);                              /* return bc */
         }
     val = *buf++;                                       /* get data */
-    if (ba & 2) M[pa10] = (M[pa10] & 0777777600000) | val;
-    else M[pa10] = (M[pa10] & 0600000777777) | (val << 18);
+    if (ba & 2) M[pa10] = (M[pa10] & 0777777600000LL) | val;
+    else M[pa10] = (M[pa10] & 0600000777777LL) | (val << 18);
     }
 return 0;
 }
diff -wruN ../orig-simhv37/PDP10/pdp10_mdfp.c ./PDP10/pdp10_mdfp.c
--- ../orig-simhv37/PDP10/pdp10_mdfp.c	2005-08-26 21:52:28.000000000 +0200
+++ ./PDP10/pdp10_mdfp.c	2007-02-06 14:53:57.000000000 +0100
@@ -126,7 +126,7 @@
 #define FP_V_SIGN       (FP_V_EXP + FP_N_EXP)           /* sign */
 #define FP_N_FLO        35                              /* # of lo frac bits */
 #define FP_V_FLO        0                               /* must be zero */
-#define FP_M_FLO        0377777777777
+#define FP_M_FLO        0377777777777LL
 #define GET_FPSIGN(x)   ((int32) (((x) >> FP_V_SIGN) & 1))
 #define GET_FPEXP(x)    ((int32) (((x) >> FP_V_EXP) & FP_M_EXP))
 #define GET_FPHI(x)     ((x) & FP_M_FHI)
@@ -141,14 +141,14 @@
 #define FP_V_URNDS      (FP_V_UFHI - 1)                 /* sp round bit */
 #define FP_V_UCRY       (FP_V_UFHI + FP_N_FHI)          /* <63> */
 #define FP_V_UNORM      (FP_V_UCRY - 1)                 /* normalized bit */
-#define FP_UFHI         0x7FFFFFF000000000
-#define FP_UFLO         0x0000000FFFFFFFFE
-#define FP_UFRAC        0x7FFFFFFFFFFFFFFE
-#define FP_URNDD        0x0000000000000001
-#define FP_URNDS        0x0000000800000000
-#define FP_UNORM        0x4000000000000000
-#define FP_UCRY         0x8000000000000000
-#define FP_ONES         0xFFFFFFFFFFFFFFFF
+#define FP_UFHI         0x7FFFFFF000000000LL
+#define FP_UFLO         0x0000000FFFFFFFFELL
+#define FP_UFRAC        0x7FFFFFFFFFFFFFFELL
+#define FP_URNDD        0x0000000000000001LL
+#define FP_URNDS        0x0000000800000000LL
+#define FP_UNORM        0x4000000000000000LL
+#define FP_UCRY         0x8000000000000000LL
+#define FP_ONES         0xFFFFFFFFFFFFFFFFLL
 
 #define UNEG(x)         ((~x) + 1)
 #define DUNEG(x)        x.flo = UNEG (x.flo); x.fhi = ~x.fhi + (x.flo == 0)
@@ -528,7 +528,7 @@
     AC(ac) = a.fhi >> sc;
     if (rnd) {
         so = a.fhi << (64 - sc);
-        if (so >= (0x8000000000000000 + a.sign)) AC(ac) = AC(ac) + 1;
+        if (so >= (0x8000000000000000LL + a.sign)) AC(ac) = AC(ac) + 1;
         }
     if (a.sign) AC(ac) = NEG (AC(ac));
     }
@@ -707,8 +707,8 @@
 {
 int32 i;
 static t_uint64 normmask[6] = {
- 0x6000000000000000, 0x7800000000000000, 0x7F80000000000000,
- 0x7FFF800000000000, 0x7FFFFFFF80000000, 0x7FFFFFFFFFFFFFFF
+ 0x6000000000000000LL, 0x7800000000000000LL, 0x7F80000000000000LL,
+ 0x7FFF800000000000LL, 0x7FFFFFFF80000000LL, 0x7FFFFFFFFFFFFFFFLL
  };
 static int32 normtab[7] = { 1, 2, 4, 8, 16, 32, 63 };
 extern a10 pager_PC;
diff -wruN ../orig-simhv37/PDP10/pdp10_rp.c ./PDP10/pdp10_rp.c
--- ../orig-simhv37/PDP10/pdp10_rp.c	2006-12-29 11:51:10.000000000 +0100
+++ ./PDP10/pdp10_rp.c	2007-02-06 14:55:13.000000000 +0100
@@ -1156,97 +1156,97 @@
 #define BOOT_LEN (sizeof (boot_rom_dec) / sizeof (d10))
 
 static const d10 boot_rom_dec[] = {
-    0515040000001,                          /* boot:hrlzi 1,1       ; uba # */
-    0201000140001,                          /*      movei 0,140001  ; vld,fst,pg 1 */
-    0713001000000+(IOBA_UBMAP+1 & RMASK),   /*      wrio 0,763001(1); set ubmap */
-    0435040000000+(IOBA_RP & RMASK),        /*      iori 1,776700   ; rh addr */
-    0202040000000+FE_RHBASE,                /*      movem 1,FE_RHBASE */
-    0201000000040,                          /*      movei 0,40      ; ctrl reset */
-    0713001000010,                          /*      wrio 0,10(1)    ; ->RPCS2 */
-    0201000000021,                          /*      movei 0,21      ; preset */
-    0713001000000,                          /*      wrio 0,0(1)     ; ->RPCS1 */
-    0201100000001,                          /*      movei 2,1       ; blk #1 */
-    0265740377032,                          /*      jsp 17,rdbl     ; read */
-    0204140001000,                          /*      movs 3,1000     ; id word */
-    0306140505755,                          /*      cain 3,sixbit /HOM/ */
-    0254000377023,                          /*      jrst .+6        ; match */
-    0201100000010,                          /*      movei 2,10      ; blk #10 */
-    0265740377032,                          /*      jsp 17,rdbl     ; read */
-    0204140001000,                          /*      movs 3,1000     ; id word */
-    0302140505755,                          /*      caie 3,sixbit /HOM/ */
-    0254200377022,                          /*      halt .          ; inv home */
-    0336100001103,                          /*      skipn 2,1103    ; pg of ptrs */
-    0254200377024,                          /*      halt .          ; inv ptr */
-    0265740377032,                          /*      jsp 17,rdbl     ; read */
-    0336100001004,                          /*      skipn 2,1004    ; mon boot */
-    0254200377027,                          /*      halt .          ; inv ptr */
-    0265740377032,                          /*      jsp 17,rdbl     ; read */
-    0254000001000,                          /*      jrst 1000       ; start */
-    0201140176000,                          /* rdbl:movei 3,176000  ; wd cnt */
-    0201200004000,                          /*      movei 4,4000    ; addr */
-    0200240000000+FE_UNIT,                  /*      move 5,FE_UNIT  ; unit */
-    0200300000002,                          /*      move 6,2 */
-    0242300777750,                          /*      lsh 6,-24.      ; cyl */
-    0713141000002,                          /*      wrio 3,2(1)     ; ->RPWC */
-    0713201000004,                          /*      wrio 4,4(1)     ; ->RPBA */
-    0713101000006,                          /*      wrio 2,6(1)     ; ->RPDA */
-    0713241000010,                          /*      wrio 5,10(1)    ; ->RPCS2 */
-    0713301000034,                          /*      wrio 6,34(1)    ; ->RPDC */
-    0201000000071,                          /*      movei 0,71      ; read+go */
-    0713001000000,                          /*      wrio 0,0(1)     ; ->RPCS1 */
-    0712341000000,                          /*      rdio 7,0(1)     ; read csr */
-    0606340000200,                          /*      trnn 7,200      ; test rdy */
-    0254000377046,                          /*      jrst .-2        ; loop */
-    0602340100000,                          /*      trne 7,100000   ; test err */
-    0254200377052,                          /*      halt */
-    0254017000000,                          /*      jrst 0(17)      ; return */
+    0515040000001LL,                          /* boot:hrlzi 1,1       ; uba # */
+    0201000140001LL,                          /*      movei 0,140001  ; vld,fst,pg 1 */
+    0713001000000LL+(IOBA_UBMAP+1 & RMASK),   /*      wrio 0,763001(1); set ubmap */
+    0435040000000LL+(IOBA_RP & RMASK),        /*      iori 1,776700   ; rh addr */
+    0202040000000LL+FE_RHBASE,                /*      movem 1,FE_RHBASE */
+    0201000000040LL,                          /*      movei 0,40      ; ctrl reset */
+    0713001000010LL,                          /*      wrio 0,10(1)    ; ->RPCS2 */
+    0201000000021LL,                          /*      movei 0,21      ; preset */
+    0713001000000LL,                          /*      wrio 0,0(1)     ; ->RPCS1 */
+    0201100000001LL,                          /*      movei 2,1       ; blk #1 */
+    0265740377032LL,                          /*      jsp 17,rdbl     ; read */
+    0204140001000LL,                          /*      movs 3,1000     ; id word */
+    0306140505755LL,                          /*      cain 3,sixbit /HOM/ */
+    0254000377023LL,                          /*      jrst .+6        ; match */
+    0201100000010LL,                          /*      movei 2,10      ; blk #10 */
+    0265740377032LL,                          /*      jsp 17,rdbl     ; read */
+    0204140001000LL,                          /*      movs 3,1000     ; id word */
+    0302140505755LL,                          /*      caie 3,sixbit /HOM/ */
+    0254200377022LL,                          /*      halt .          ; inv home */
+    0336100001103LL,                          /*      skipn 2,1103    ; pg of ptrs */
+    0254200377024LL,                          /*      halt .          ; inv ptr */
+    0265740377032LL,                          /*      jsp 17,rdbl     ; read */
+    0336100001004LL,                          /*      skipn 2,1004    ; mon boot */
+    0254200377027LL,                          /*      halt .          ; inv ptr */
+    0265740377032LL,                          /*      jsp 17,rdbl     ; read */
+    0254000001000LL,                          /*      jrst 1000       ; start */
+    0201140176000LL,                          /* rdbl:movei 3,176000  ; wd cnt */
+    0201200004000LL,                          /*      movei 4,4000    ; addr */
+    0200240000000LL+FE_UNIT,                  /*      move 5,FE_UNIT  ; unit */
+    0200300000002LL,                          /*      move 6,2 */
+    0242300777750LL,                          /*      lsh 6,-24.      ; cyl */
+    0713141000002LL,                          /*      wrio 3,2(1)     ; ->RPWC */
+    0713201000004LL,                          /*      wrio 4,4(1)     ; ->RPBA */
+    0713101000006LL,                          /*      wrio 2,6(1)     ; ->RPDA */
+    0713241000010LL,                          /*      wrio 5,10(1)    ; ->RPCS2 */
+    0713301000034LL,                          /*      wrio 6,34(1)    ; ->RPDC */
+    0201000000071LL,                          /*      movei 0,71      ; read+go */
+    0713001000000LL,                          /*      wrio 0,0(1)     ; ->RPCS1 */
+    0712341000000LL,                          /*      rdio 7,0(1)     ; read csr */
+    0606340000200LL,                          /*      trnn 7,200      ; test rdy */
+    0254000377046LL,                          /*      jrst .-2        ; loop */
+    0602340100000LL,                          /*      trne 7,100000   ; test err */
+    0254200377052LL,                          /*      halt */
+    0254017000000LL,                          /*      jrst 0(17)      ; return */
     };
 
 static const d10 boot_rom_its[] = {
-    0515040000001,                          /* boot:hrlzi 1,1       ; uba # */
-    0201000140001,                          /*      movei 0,140001  ; vld,fst,pg 1 */
-    0715000000000+(IOBA_UBMAP+1 & RMASK),   /*      iowrq 0,763001  ; set ubmap */
-    0435040000000+(IOBA_RP & RMASK),        /*      iori 1,776700   ; rh addr */
-    0202040000000+FE_RHBASE,                /*      movem 1,FE_RHBASE */
-    0201000000040,                          /*      movei 0,40      ; ctrl reset */
-    0715001000010,                          /*      iowrq 0,10(1)   ; ->RPCS2 */
-    0201000000021,                          /*      movei 0,21      ; preset */
-    0715001000000,                          /*      iowrq 0,0(1)    ; ->RPCS1 */
-    0201100000001,                          /*      movei 2,1       ; blk #1 */
-    0265740377032,                          /*      jsp 17,rdbl     ; read */
-    0204140001000,                          /*      movs 3,1000     ; id word */
-    0306140505755,                          /*      cain 3,sixbit /HOM/ */
-    0254000377023,                          /*      jrst .+6        ; match */
-    0201100000010,                          /*      movei 2,10      ; blk #10 */
-    0265740377032,                          /*      jsp 17,rdbl     ; read */
-    0204140001000,                          /*      movs 3,1000     ; id word */
-    0302140505755,                          /*      caie 3,sixbit /HOM/ */
-    0254200377022,                          /*      halt .          ; inv home */
-    0336100001103,                          /*      skipn 2,1103    ; pg of ptrs */
-    0254200377024,                          /*      halt .          ; inv ptr */
-    0265740377032,                          /*      jsp 17,rdbl     ; read */
-    0336100001004,                          /*      skipn 2,1004    ; mon boot */
-    0254200377027,                          /*      halt .          ; inv ptr */
-    0265740377032,                          /*      jsp 17,rdbl     ; read */
-    0254000001000,                          /*      jrst 1000       ; start */
-    0201140176000,                          /* rdbl:movei 3,176000  ; wd cnt */
-    0201200004000,                          /*      movei 4,4000    ; addr */
-    0200240000000+FE_UNIT,                  /*      move 5,FE_UNIT  ; unit */
-    0200300000002,                          /*      move 6,2 */
-    0242300777750,                          /*      lsh 6,-24.      ; cyl */
-    0715141000002,                          /*      iowrq 3,2(1)    ; ->RPWC */
-    0715201000004,                          /*      iowrq 4,4(1)    ; ->RPBA */
-    0715101000006,                          /*      iowrq 2,6(1)    ; ->RPDA */
-    0715241000010,                          /*      iowrq 5,10(1)   ; ->RPCS2 */
-    0715301000034,                          /*      iowrq 6,34(1)   ; ->RPDC */
-    0201000000071,                          /*      movei 0,71      ; read+go */
-    0715001000000,                          /*      iowrq 0,0(1)    ; ->RPCS1 */
-    0711341000000,                          /*      iordq 7,0(1)    ; read csr */
-    0606340000200,                          /*      trnn 7,200      ; test rdy */
-    0254000377046,                          /*      jrst .-2        ; loop */
-    0602340100000,                          /*      trne 7,100000   ; test err */
-    0254200377052,                          /*      halt */
-    0254017000000,                          /*      jrst 0(17)      ; return */
+    0515040000001LL,                          /* boot:hrlzi 1,1       ; uba # */
+    0201000140001LL,                          /*      movei 0,140001  ; vld,fst,pg 1 */
+    0715000000000LL+(IOBA_UBMAP+1 & RMASK),   /*      iowrq 0,763001  ; set ubmap */
+    0435040000000LL+(IOBA_RP & RMASK),        /*      iori 1,776700   ; rh addr */
+    0202040000000LL+FE_RHBASE,                /*      movem 1,FE_RHBASE */
+    0201000000040LL,                          /*      movei 0,40      ; ctrl reset */
+    0715001000010LL,                          /*      iowrq 0,10(1)   ; ->RPCS2 */
+    0201000000021LL,                          /*      movei 0,21      ; preset */
+    0715001000000LL,                          /*      iowrq 0,0(1)    ; ->RPCS1 */
+    0201100000001LL,                          /*      movei 2,1       ; blk #1 */
+    0265740377032LL,                          /*      jsp 17,rdbl     ; read */
+    0204140001000LL,                          /*      movs 3,1000     ; id word */
+    0306140505755LL,                          /*      cain 3,sixbit /HOM/ */
+    0254000377023LL,                          /*      jrst .+6        ; match */
+    0201100000010LL,                          /*      movei 2,10      ; blk #10 */
+    0265740377032LL,                          /*      jsp 17,rdbl     ; read */
+    0204140001000LL,                          /*      movs 3,1000     ; id word */
+    0302140505755LL,                          /*      caie 3,sixbit /HOM/ */
+    0254200377022LL,                          /*      halt .          ; inv home */
+    0336100001103LL,                          /*      skipn 2,1103    ; pg of ptrs */
+    0254200377024LL,                          /*      halt .          ; inv ptr */
+    0265740377032LL,                          /*      jsp 17,rdbl     ; read */
+    0336100001004LL,                          /*      skipn 2,1004    ; mon boot */
+    0254200377027LL,                          /*      halt .          ; inv ptr */
+    0265740377032LL,                          /*      jsp 17,rdbl     ; read */
+    0254000001000LL,                          /*      jrst 1000       ; start */
+    0201140176000LL,                          /* rdbl:movei 3,176000  ; wd cnt */
+    0201200004000LL,                          /*      movei 4,4000    ; addr */
+    0200240000000LL+FE_UNIT,                  /*      move 5,FE_UNIT  ; unit */
+    0200300000002LL,                          /*      move 6,2 */
+    0242300777750LL,                          /*      lsh 6,-24.      ; cyl */
+    0715141000002LL,                          /*      iowrq 3,2(1)    ; ->RPWC */
+    0715201000004LL,                          /*      iowrq 4,4(1)    ; ->RPBA */
+    0715101000006LL,                          /*      iowrq 2,6(1)    ; ->RPDA */
+    0715241000010LL,                          /*      iowrq 5,10(1)   ; ->RPCS2 */
+    0715301000034LL,                          /*      iowrq 6,34(1)   ; ->RPDC */
+    0201000000071LL,                          /*      movei 0,71      ; read+go */
+    0715001000000LL,                          /*      iowrq 0,0(1)    ; ->RPCS1 */
+    0711341000000LL,                          /*      iordq 7,0(1)    ; read csr */
+    0606340000200LL,                          /*      trnn 7,200      ; test rdy */
+    0254000377046LL,                          /*      jrst .-2        ; loop */
+    0602340100000LL,                          /*      trne 7,100000   ; test err */
+    0254200377052LL,                          /*      halt */
+    0254017000000LL,                          /*      jrst 0(17)      ; return */
     };
 
 t_stat rp_boot (int32 unitno, DEVICE *dptr)
diff -wruN ../orig-simhv37/PDP10/pdp10_sys.c ./PDP10/pdp10_sys.c
--- ../orig-simhv37/PDP10/pdp10_sys.c	2007-02-01 11:24:40.000000000 +0100
+++ ./PDP10/pdp10_sys.c	2007-02-06 14:56:49.000000000 +0100
@@ -358,10 +358,10 @@
 
 #define I_V_FL          39                              /* inst class */
 #define I_M_FL          03                              /* class mask */
-#define I_ITS           004000000000000                 /* ITS flag */
+#define I_ITS           004000000000000LL                 /* ITS flag */
 #define I_AC            000000000000000                 /* AC, address */
-#define I_OP            010000000000000                 /* address only */
-#define I_IO            020000000000000                 /* classic I/O */
+#define I_OP            010000000000000LL                 /* address only */
+#define I_IO            020000000000000LL                 /* classic I/O */
 #define I_V_AC          00
 #define I_V_OP          01
 #define I_V_IO          02
@@ -476,170 +476,170 @@
 };
 
 static const d10 opc_val[] = {
- 0102000000000+I_AC+I_ITS, 0103000000000+I_AC+I_ITS,
- 0710000000000+I_AC+I_ITS, 0711000000000+I_AC+I_ITS, 0712000000000+I_AC+I_ITS,
- 0713000000000+I_AC+I_ITS, 0714000000000+I_AC+I_ITS, 0715000000000+I_AC+I_ITS,
- 0720000000000+I_AC+I_ITS, 0721000000000+I_AC+I_ITS, 0722000000000+I_AC+I_ITS,
- 0723000000000+I_AC+I_ITS, 0724000000000+I_AC+I_ITS, 0725000000000+I_AC+I_ITS,
- 0701000000000+I_OP+I_ITS, 0701440000000+I_OP+I_ITS, 0701540000000+I_OP+I_ITS,
- 0702000000000+I_OP+I_ITS, 0702040000000+I_OP+I_ITS,
- 0702100000000+I_OP+I_ITS, 0702140000000+I_OP+I_ITS, 0702340000000+I_OP+I_ITS,
- 0702400000000+I_OP+I_ITS, 0702440000000+I_OP+I_ITS,
- 0702500000000+I_OP+I_ITS, 0702540000000+I_OP+I_ITS, 0702740000000+I_OP+I_ITS,
- 
- 0254040000000+I_OP, 0254100000000+I_OP,
- 0254200000000+I_OP, 0254240000000+I_OP, 0254300000000+I_OP, 0254340000000+I_OP,
- 0254500000000+I_OP, 0254600000000+I_OP, 0254640000000+I_OP, 0133000000000+I_OP,
- 0255040000000+I_OP, 0255100000000+I_OP, 0255200000000+I_OP, 0255300000000+I_OP,
- 0255400000000+I_OP,
-
- 0700000000000+I_OP, 0700200000000+I_OP, 0700240000000+I_OP, 0700600000000+I_OP,
- 0700640000000+I_OP, 0701040000000+I_OP, 0701100000000+I_OP, 0701140000000+I_OP,
- 0701200000000+I_OP, 0701240000000+I_OP,
- 0702000000000+I_OP, 0702040000000+I_OP, 0702100000000+I_OP, 0702140000000+I_OP,
- 0702200000000+I_OP, 0702240000000+I_OP, 0702300000000+I_OP,
- 0702400000000+I_OP, 0702440000000+I_OP, 0702500000000+I_OP, 0702540000000+I_OP,
- 0702600000000+I_OP, 0702640000000+I_OP, 0702700000000+I_OP,
-
-                     0001000000000+I_AC, 0002000000000+I_AC, 0003000000000+I_AC,
- 0004000000000+I_AC, 0005000000000+I_AC, 0006000000000+I_AC, 0007000000000+I_AC,
- 0010000000000+I_AC, 0011000000000+I_AC, 0012000000000+I_AC, 0013000000000+I_AC,
- 0014000000000+I_AC, 0015000000000+I_AC, 0016000000000+I_AC, 0017000000000+I_AC,
- 0020000000000+I_AC, 0021000000000+I_AC, 0022000000000+I_AC, 0023000000000+I_AC,
- 0024000000000+I_AC, 0025000000000+I_AC, 0026000000000+I_AC, 0027000000000+I_AC,
- 0030000000000+I_AC, 0031000000000+I_AC, 0032000000000+I_AC, 0033000000000+I_AC,
- 0034000000000+I_AC, 0035000000000+I_AC, 0036000000000+I_AC, 0037000000000+I_AC,
- 0040000000000+I_AC, 0041000000000+I_AC, 0042000000000+I_AC, 0043000000000+I_AC,
- 0044000000000+I_AC, 0045000000000+I_AC, 0046000000000+I_AC, 0047000000000+I_AC,
- 0050000000000+I_AC, 0051000000000+I_AC, 0052000000000+I_AC, 0053000000000+I_AC,
- 0054000000000+I_AC, 0055000000000+I_AC, 0056000000000+I_AC, 0057000000000+I_AC,
- 0060000000000+I_AC, 0061000000000+I_AC, 0062000000000+I_AC, 0063000000000+I_AC,
- 0064000000000+I_AC, 0065000000000+I_AC, 0066000000000+I_AC, 0067000000000+I_AC,
- 0070000000000+I_AC, 0071000000000+I_AC, 0072000000000+I_AC, 0073000000000+I_AC,
- 0074000000000+I_AC, 0075000000000+I_AC, 0076000000000+I_AC, 0077000000000+I_AC,
-
- 0100000000000+I_AC,                     0102000000000+I_AC, 0103000000000+I_AC,
- 0104000000000+I_AC, 0105000000000+I_AC, 0106000000000+I_AC, 0107000000000+I_AC,
- 0110000000000+I_AC, 0111000000000+I_AC, 0112000000000+I_AC, 0113000000000+I_AC,
- 0114000000000+I_AC, 0115000000000+I_AC, 0116000000000+I_AC, 0117000000000+I_AC,
- 0120000000000+I_AC, 0121000000000+I_AC, 0122000000000+I_AC, 0123000000000+I_AC,
- 0124000000000+I_AC, 0125000000000+I_AC, 0126000000000+I_AC, 0127000000000+I_AC,
- 0130000000000+I_AC, 0131000000000+I_AC, 0132000000000+I_AC, 0133000000000+I_AC,
- 0134000000000+I_AC, 0135000000000+I_AC, 0136000000000+I_AC, 0137000000000+I_AC,
- 0140000000000+I_AC, 0141000000000+I_AC, 0142000000000+I_AC, 0143000000000+I_AC,
- 0144000000000+I_AC, 0145000000000+I_AC, 0146000000000+I_AC, 0147000000000+I_AC,
- 0150000000000+I_AC, 0151000000000+I_AC, 0152000000000+I_AC, 0153000000000+I_AC,
- 0154000000000+I_AC, 0155000000000+I_AC, 0156000000000+I_AC, 0157000000000+I_AC,
- 0160000000000+I_AC, 0161000000000+I_AC, 0162000000000+I_AC, 0163000000000+I_AC,
- 0164000000000+I_AC, 0165000000000+I_AC, 0166000000000+I_AC, 0167000000000+I_AC,
- 0170000000000+I_AC, 0171000000000+I_AC, 0172000000000+I_AC, 0173000000000+I_AC,
- 0174000000000+I_AC, 0175000000000+I_AC, 0176000000000+I_AC, 0177000000000+I_AC,
-
- 0200000000000+I_AC, 0201000000000+I_AC, 0202000000000+I_AC, 0203000000000+I_AC,
- 0204000000000+I_AC, 0205000000000+I_AC, 0206000000000+I_AC, 0207000000000+I_AC,
- 0210000000000+I_AC, 0211000000000+I_AC, 0212000000000+I_AC, 0213000000000+I_AC,
- 0214000000000+I_AC, 0215000000000+I_AC, 0216000000000+I_AC, 0217000000000+I_AC,
- 0220000000000+I_AC, 0221000000000+I_AC, 0222000000000+I_AC, 0223000000000+I_AC,
- 0224000000000+I_AC, 0225000000000+I_AC, 0226000000000+I_AC, 0227000000000+I_AC,
- 0230000000000+I_AC, 0231000000000+I_AC, 0232000000000+I_AC, 0233000000000+I_AC,
- 0234000000000+I_AC, 0235000000000+I_AC, 0236000000000+I_AC, 0237000000000+I_AC,
- 0240000000000+I_AC, 0241000000000+I_AC, 0242000000000+I_AC, 0243000000000+I_AC,
- 0244000000000+I_AC, 0245000000000+I_AC, 0246000000000+I_AC, 0247000000000+I_AC+I_ITS,
- 0250000000000+I_AC, 0251000000000+I_AC, 0252000000000+I_AC, 0253000000000+I_AC,
- 0254000000000+I_AC, 0255000000000+I_AC, 0256000000000+I_AC, 0257000000000+I_AC,
- 0260000000000+I_AC, 0261000000000+I_AC, 0262000000000+I_AC, 0263000000000+I_AC,
- 0264000000000+I_AC, 0265000000000+I_AC, 0266000000000+I_AC, 0267000000000+I_AC,
- 0270000000000+I_AC, 0271000000000+I_AC, 0272000000000+I_AC, 0273000000000+I_AC,
- 0274000000000+I_AC, 0275000000000+I_AC, 0276000000000+I_AC, 0277000000000+I_AC,
-
- 0300000000000+I_AC, 0301000000000+I_AC, 0302000000000+I_AC, 0303000000000+I_AC,
- 0304000000000+I_AC, 0305000000000+I_AC, 0306000000000+I_AC, 0307000000000+I_AC,
- 0310000000000+I_AC, 0311000000000+I_AC, 0312000000000+I_AC, 0313000000000+I_AC,
- 0314000000000+I_AC, 0315000000000+I_AC, 0316000000000+I_AC, 0317000000000+I_AC,
- 0320000000000+I_AC, 0321000000000+I_AC, 0322000000000+I_AC, 0323000000000+I_AC,
- 0324000000000+I_AC, 0325000000000+I_AC, 0326000000000+I_AC, 0327000000000+I_AC,
- 0330000000000+I_AC, 0331000000000+I_AC, 0332000000000+I_AC, 0333000000000+I_AC,
- 0334000000000+I_AC, 0335000000000+I_AC, 0336000000000+I_AC, 0337000000000+I_AC,
- 0340000000000+I_AC, 0341000000000+I_AC, 0342000000000+I_AC, 0343000000000+I_AC,
- 0344000000000+I_AC, 0345000000000+I_AC, 0346000000000+I_AC, 0347000000000+I_AC,
- 0350000000000+I_AC, 0351000000000+I_AC, 0352000000000+I_AC, 0353000000000+I_AC,
- 0354000000000+I_AC, 0355000000000+I_AC, 0356000000000+I_AC, 0357000000000+I_AC,
- 0360000000000+I_AC, 0361000000000+I_AC, 0362000000000+I_AC, 0363000000000+I_AC,
- 0364000000000+I_AC, 0365000000000+I_AC, 0366000000000+I_AC, 0367000000000+I_AC,
- 0370000000000+I_AC, 0371000000000+I_AC, 0372000000000+I_AC, 0373000000000+I_AC,
- 0374000000000+I_AC, 0375000000000+I_AC, 0376000000000+I_AC, 0377000000000+I_AC,
-
- 0400000000000+I_AC, 0401000000000+I_AC, 0402000000000+I_AC, 0403000000000+I_AC,
- 0404000000000+I_AC, 0405000000000+I_AC, 0406000000000+I_AC, 0407000000000+I_AC,
- 0410000000000+I_AC, 0411000000000+I_AC, 0412000000000+I_AC, 0413000000000+I_AC,
- 0414000000000+I_AC, 0415000000000+I_AC, 0416000000000+I_AC, 0417000000000+I_AC,
- 0420000000000+I_AC, 0421000000000+I_AC, 0422000000000+I_AC, 0423000000000+I_AC,
- 0424000000000+I_AC, 0425000000000+I_AC, 0426000000000+I_AC, 0427000000000+I_AC,
- 0430000000000+I_AC, 0431000000000+I_AC, 0432000000000+I_AC, 0433000000000+I_AC,
- 0434000000000+I_AC, 0435000000000+I_AC, 0436000000000+I_AC, 0437000000000+I_AC,
- 0440000000000+I_AC, 0441000000000+I_AC, 0442000000000+I_AC, 0443000000000+I_AC,
- 0444000000000+I_AC, 0445000000000+I_AC, 0446000000000+I_AC, 0447000000000+I_AC,
- 0450000000000+I_AC, 0451000000000+I_AC, 0452000000000+I_AC, 0453000000000+I_AC,
- 0454000000000+I_AC, 0455000000000+I_AC, 0456000000000+I_AC, 0457000000000+I_AC,
- 0460000000000+I_AC, 0461000000000+I_AC, 0462000000000+I_AC, 0463000000000+I_AC,
- 0464000000000+I_AC, 0465000000000+I_AC, 0466000000000+I_AC, 0467000000000+I_AC,
- 0470000000000+I_AC, 0471000000000+I_AC, 0472000000000+I_AC, 0473000000000+I_AC,
- 0474000000000+I_AC, 0475000000000+I_AC, 0476000000000+I_AC, 0477000000000+I_AC,
-
- 0500000000000+I_AC, 0501000000000+I_AC, 0502000000000+I_AC, 0503000000000+I_AC,
- 0504000000000+I_AC, 0505000000000+I_AC, 0506000000000+I_AC, 0507000000000+I_AC,
- 0510000000000+I_AC, 0511000000000+I_AC, 0512000000000+I_AC, 0513000000000+I_AC,
- 0514000000000+I_AC, 0515000000000+I_AC, 0516000000000+I_AC, 0517000000000+I_AC,
- 0520000000000+I_AC, 0521000000000+I_AC, 0522000000000+I_AC, 0523000000000+I_AC,
- 0524000000000+I_AC, 0525000000000+I_AC, 0526000000000+I_AC, 0527000000000+I_AC,
- 0530000000000+I_AC, 0531000000000+I_AC, 0532000000000+I_AC, 0533000000000+I_AC,
- 0534000000000+I_AC, 0535000000000+I_AC, 0536000000000+I_AC, 0537000000000+I_AC,
- 0540000000000+I_AC, 0541000000000+I_AC, 0542000000000+I_AC, 0543000000000+I_AC,
- 0544000000000+I_AC, 0545000000000+I_AC, 0546000000000+I_AC, 0547000000000+I_AC,
- 0550000000000+I_AC, 0551000000000+I_AC, 0552000000000+I_AC, 0553000000000+I_AC,
- 0554000000000+I_AC, 0555000000000+I_AC, 0556000000000+I_AC, 0557000000000+I_AC,
- 0560000000000+I_AC, 0561000000000+I_AC, 0562000000000+I_AC, 0563000000000+I_AC,
- 0564000000000+I_AC, 0565000000000+I_AC, 0566000000000+I_AC, 0567000000000+I_AC,
- 0570000000000+I_AC, 0571000000000+I_AC, 0572000000000+I_AC, 0573000000000+I_AC,
- 0574000000000+I_AC, 0575000000000+I_AC, 0576000000000+I_AC, 0577000000000+I_AC,
-
- 0600000000000+I_AC, 0601000000000+I_AC, 0602000000000+I_AC, 0603000000000+I_AC,
- 0604000000000+I_AC, 0605000000000+I_AC, 0606000000000+I_AC, 0607000000000+I_AC,
- 0610000000000+I_AC, 0611000000000+I_AC, 0612000000000+I_AC, 0613000000000+I_AC,
- 0614000000000+I_AC, 0615000000000+I_AC, 0616000000000+I_AC, 0617000000000+I_AC,
- 0620000000000+I_AC, 0621000000000+I_AC, 0622000000000+I_AC, 0623000000000+I_AC,
- 0624000000000+I_AC, 0625000000000+I_AC, 0626000000000+I_AC, 0627000000000+I_AC,
- 0630000000000+I_AC, 0631000000000+I_AC, 0632000000000+I_AC, 0633000000000+I_AC,
- 0634000000000+I_AC, 0635000000000+I_AC, 0636000000000+I_AC, 0637000000000+I_AC,
- 0640000000000+I_AC, 0641000000000+I_AC, 0642000000000+I_AC, 0643000000000+I_AC,
- 0644000000000+I_AC, 0645000000000+I_AC, 0646000000000+I_AC, 0647000000000+I_AC,
- 0650000000000+I_AC, 0651000000000+I_AC, 0652000000000+I_AC, 0653000000000+I_AC,
- 0654000000000+I_AC, 0655000000000+I_AC, 0656000000000+I_AC, 0657000000000+I_AC,
- 0660000000000+I_AC, 0661000000000+I_AC, 0662000000000+I_AC, 0663000000000+I_AC,
- 0664000000000+I_AC, 0665000000000+I_AC, 0666000000000+I_AC, 0667000000000+I_AC,
- 0670000000000+I_AC, 0671000000000+I_AC, 0672000000000+I_AC, 0673000000000+I_AC,
- 0674000000000+I_AC, 0675000000000+I_AC, 0676000000000+I_AC, 0677000000000+I_AC,
-
- 0704000000000+I_AC, 0705000000000+I_AC,
- 0710000000000+I_AC, 0711000000000+I_AC, 0712000000000+I_AC, 0713000000000+I_AC,
- 0714000000000+I_AC, 0715000000000+I_AC, 0716000000000+I_AC, 0717000000000+I_AC,
- 0720000000000+I_AC, 0721000000000+I_AC, 0722000000000+I_AC, 0723000000000+I_AC,
- 0724000000000+I_AC, 0725000000000+I_AC,
-
- 0700000000000+I_IO, 0700040000000+I_IO, 0700100000000+I_IO, 0700140000000+I_IO,
- 0700200000000+I_IO, 0700240000000+I_IO, 0700300000000+I_IO, 0700340000000+I_IO,
-
- 0400000000000+I_AC, 0401000000000+I_AC, 0402000000000+I_AC, 0403000000000+I_AC,
- 0434000000000+I_AC, 0435000000000+I_AC, 0436000000000+I_AC, 0437000000000+I_AC,
- 0415000000000+I_AC, 0501000000000+I_AC,
- 
-                     0001000000000+I_AC, 0002000000000+I_AC, 0003000000000+I_AC,
- 0004000000000+I_AC, 0005000000000+I_AC, 0006000000000+I_AC, 0007000000000+I_AC,
- 0010000000000+I_AC, 0011000000000+I_AC, 0012000000000+I_AC, 0013000000000+I_AC,
- 0014000000000+I_AC, 0015000000000+I_AC, 0016000000000+I_AC, 0017000000000+I_AC,
- 0020000000000+I_AC, 0021000000000+I_AC, 0022000000000+I_AC, 0023000000000+I_AC,
- 0024000000000+I_AC, 0025000000000+I_AC, 0026000000000+I_AC, 0027000000000+I_AC,
- 0030000000000+I_AC, 0031000000000+I_AC,
+ 0102000000000LL+I_AC+I_ITS, 0103000000000LL+I_AC+I_ITS,
+ 0710000000000LL+I_AC+I_ITS, 0711000000000LL+I_AC+I_ITS, 0712000000000LL+I_AC+I_ITS,
+ 0713000000000LL+I_AC+I_ITS, 0714000000000LL+I_AC+I_ITS, 0715000000000LL+I_AC+I_ITS,
+ 0720000000000LL+I_AC+I_ITS, 0721000000000LL+I_AC+I_ITS, 0722000000000LL+I_AC+I_ITS,
+ 0723000000000LL+I_AC+I_ITS, 0724000000000LL+I_AC+I_ITS, 0725000000000LL+I_AC+I_ITS,
+ 0701000000000LL+I_OP+I_ITS, 0701440000000LL+I_OP+I_ITS, 0701540000000LL+I_OP+I_ITS,
+ 0702000000000LL+I_OP+I_ITS, 0702040000000LL+I_OP+I_ITS,
+ 0702100000000LL+I_OP+I_ITS, 0702140000000LL+I_OP+I_ITS, 0702340000000LL+I_OP+I_ITS,
+ 0702400000000LL+I_OP+I_ITS, 0702440000000LL+I_OP+I_ITS,
+ 0702500000000LL+I_OP+I_ITS, 0702540000000LL+I_OP+I_ITS, 0702740000000LL+I_OP+I_ITS,
+ 
+ 0254040000000LL+I_OP, 0254100000000LL+I_OP,
+ 0254200000000LL+I_OP, 0254240000000LL+I_OP, 0254300000000LL+I_OP, 0254340000000LL+I_OP,
+ 0254500000000LL+I_OP, 0254600000000LL+I_OP, 0254640000000LL+I_OP, 0133000000000LL+I_OP,
+ 0255040000000LL+I_OP, 0255100000000LL+I_OP, 0255200000000LL+I_OP, 0255300000000LL+I_OP,
+ 0255400000000LL+I_OP,
+
+ 0700000000000LL+I_OP, 0700200000000LL+I_OP, 0700240000000LL+I_OP, 0700600000000LL+I_OP,
+ 0700640000000LL+I_OP, 0701040000000LL+I_OP, 0701100000000LL+I_OP, 0701140000000LL+I_OP,
+ 0701200000000LL+I_OP, 0701240000000LL+I_OP,
+ 0702000000000LL+I_OP, 0702040000000LL+I_OP, 0702100000000LL+I_OP, 0702140000000LL+I_OP,
+ 0702200000000LL+I_OP, 0702240000000LL+I_OP, 0702300000000LL+I_OP,
+ 0702400000000LL+I_OP, 0702440000000LL+I_OP, 0702500000000LL+I_OP, 0702540000000LL+I_OP,
+ 0702600000000LL+I_OP, 0702640000000LL+I_OP, 0702700000000LL+I_OP,
+
+                     0001000000000LL+I_AC, 0002000000000LL+I_AC, 0003000000000LL+I_AC,
+ 0004000000000LL+I_AC, 0005000000000LL+I_AC, 0006000000000LL+I_AC, 0007000000000LL+I_AC,
+ 0010000000000LL+I_AC, 0011000000000LL+I_AC, 0012000000000LL+I_AC, 0013000000000LL+I_AC,
+ 0014000000000LL+I_AC, 0015000000000LL+I_AC, 0016000000000LL+I_AC, 0017000000000LL+I_AC,
+ 0020000000000LL+I_AC, 0021000000000LL+I_AC, 0022000000000LL+I_AC, 0023000000000LL+I_AC,
+ 0024000000000LL+I_AC, 0025000000000LL+I_AC, 0026000000000LL+I_AC, 0027000000000LL+I_AC,
+ 0030000000000LL+I_AC, 0031000000000LL+I_AC, 0032000000000LL+I_AC, 0033000000000LL+I_AC,
+ 0034000000000LL+I_AC, 0035000000000LL+I_AC, 0036000000000LL+I_AC, 0037000000000LL+I_AC,
+ 0040000000000LL+I_AC, 0041000000000LL+I_AC, 0042000000000LL+I_AC, 0043000000000LL+I_AC,
+ 0044000000000LL+I_AC, 0045000000000LL+I_AC, 0046000000000LL+I_AC, 0047000000000LL+I_AC,
+ 0050000000000LL+I_AC, 0051000000000LL+I_AC, 0052000000000LL+I_AC, 0053000000000LL+I_AC,
+ 0054000000000LL+I_AC, 0055000000000LL+I_AC, 0056000000000LL+I_AC, 0057000000000LL+I_AC,
+ 0060000000000LL+I_AC, 0061000000000LL+I_AC, 0062000000000LL+I_AC, 0063000000000LL+I_AC,
+ 0064000000000LL+I_AC, 0065000000000LL+I_AC, 0066000000000LL+I_AC, 0067000000000LL+I_AC,
+ 0070000000000LL+I_AC, 0071000000000LL+I_AC, 0072000000000LL+I_AC, 0073000000000LL+I_AC,
+ 0074000000000LL+I_AC, 0075000000000LL+I_AC, 0076000000000LL+I_AC, 0077000000000LL+I_AC,
+
+ 0100000000000LL+I_AC,                     0102000000000LL+I_AC, 0103000000000LL+I_AC,
+ 0104000000000LL+I_AC, 0105000000000LL+I_AC, 0106000000000LL+I_AC, 0107000000000LL+I_AC,
+ 0110000000000LL+I_AC, 0111000000000LL+I_AC, 0112000000000LL+I_AC, 0113000000000LL+I_AC,
+ 0114000000000LL+I_AC, 0115000000000LL+I_AC, 0116000000000LL+I_AC, 0117000000000LL+I_AC,
+ 0120000000000LL+I_AC, 0121000000000LL+I_AC, 0122000000000LL+I_AC, 0123000000000LL+I_AC,
+ 0124000000000LL+I_AC, 0125000000000LL+I_AC, 0126000000000LL+I_AC, 0127000000000LL+I_AC,
+ 0130000000000LL+I_AC, 0131000000000LL+I_AC, 0132000000000LL+I_AC, 0133000000000LL+I_AC,
+ 0134000000000LL+I_AC, 0135000000000LL+I_AC, 0136000000000LL+I_AC, 0137000000000LL+I_AC,
+ 0140000000000LL+I_AC, 0141000000000LL+I_AC, 0142000000000LL+I_AC, 0143000000000LL+I_AC,
+ 0144000000000LL+I_AC, 0145000000000LL+I_AC, 0146000000000LL+I_AC, 0147000000000LL+I_AC,
+ 0150000000000LL+I_AC, 0151000000000LL+I_AC, 0152000000000LL+I_AC, 0153000000000LL+I_AC,
+ 0154000000000LL+I_AC, 0155000000000LL+I_AC, 0156000000000LL+I_AC, 0157000000000LL+I_AC,
+ 0160000000000LL+I_AC, 0161000000000LL+I_AC, 0162000000000LL+I_AC, 0163000000000LL+I_AC,
+ 0164000000000LL+I_AC, 0165000000000LL+I_AC, 0166000000000LL+I_AC, 0167000000000LL+I_AC,
+ 0170000000000LL+I_AC, 0171000000000LL+I_AC, 0172000000000LL+I_AC, 0173000000000LL+I_AC,
+ 0174000000000LL+I_AC, 0175000000000LL+I_AC, 0176000000000LL+I_AC, 0177000000000LL+I_AC,
+
+ 0200000000000LL+I_AC, 0201000000000LL+I_AC, 0202000000000LL+I_AC, 0203000000000LL+I_AC,
+ 0204000000000LL+I_AC, 0205000000000LL+I_AC, 0206000000000LL+I_AC, 0207000000000LL+I_AC,
+ 0210000000000LL+I_AC, 0211000000000LL+I_AC, 0212000000000LL+I_AC, 0213000000000LL+I_AC,
+ 0214000000000LL+I_AC, 0215000000000LL+I_AC, 0216000000000LL+I_AC, 0217000000000LL+I_AC,
+ 0220000000000LL+I_AC, 0221000000000LL+I_AC, 0222000000000LL+I_AC, 0223000000000LL+I_AC,
+ 0224000000000LL+I_AC, 0225000000000LL+I_AC, 0226000000000LL+I_AC, 0227000000000LL+I_AC,
+ 0230000000000LL+I_AC, 0231000000000LL+I_AC, 0232000000000LL+I_AC, 0233000000000LL+I_AC,
+ 0234000000000LL+I_AC, 0235000000000LL+I_AC, 0236000000000LL+I_AC, 0237000000000LL+I_AC,
+ 0240000000000LL+I_AC, 0241000000000LL+I_AC, 0242000000000LL+I_AC, 0243000000000LL+I_AC,
+ 0244000000000LL+I_AC, 0245000000000LL+I_AC, 0246000000000LL+I_AC, 0247000000000LL+I_AC+I_ITS,
+ 0250000000000LL+I_AC, 0251000000000LL+I_AC, 0252000000000LL+I_AC, 0253000000000LL+I_AC,
+ 0254000000000LL+I_AC, 0255000000000LL+I_AC, 0256000000000LL+I_AC, 0257000000000LL+I_AC,
+ 0260000000000LL+I_AC, 0261000000000LL+I_AC, 0262000000000LL+I_AC, 0263000000000LL+I_AC,
+ 0264000000000LL+I_AC, 0265000000000LL+I_AC, 0266000000000LL+I_AC, 0267000000000LL+I_AC,
+ 0270000000000LL+I_AC, 0271000000000LL+I_AC, 0272000000000LL+I_AC, 0273000000000LL+I_AC,
+ 0274000000000LL+I_AC, 0275000000000LL+I_AC, 0276000000000LL+I_AC, 0277000000000LL+I_AC,
+
+ 0300000000000LL+I_AC, 0301000000000LL+I_AC, 0302000000000LL+I_AC, 0303000000000LL+I_AC,
+ 0304000000000LL+I_AC, 0305000000000LL+I_AC, 0306000000000LL+I_AC, 0307000000000LL+I_AC,
+ 0310000000000LL+I_AC, 0311000000000LL+I_AC, 0312000000000LL+I_AC, 0313000000000LL+I_AC,
+ 0314000000000LL+I_AC, 0315000000000LL+I_AC, 0316000000000LL+I_AC, 0317000000000LL+I_AC,
+ 0320000000000LL+I_AC, 0321000000000LL+I_AC, 0322000000000LL+I_AC, 0323000000000LL+I_AC,
+ 0324000000000LL+I_AC, 0325000000000LL+I_AC, 0326000000000LL+I_AC, 0327000000000LL+I_AC,
+ 0330000000000LL+I_AC, 0331000000000LL+I_AC, 0332000000000LL+I_AC, 0333000000000LL+I_AC,
+ 0334000000000LL+I_AC, 0335000000000LL+I_AC, 0336000000000LL+I_AC, 0337000000000LL+I_AC,
+ 0340000000000LL+I_AC, 0341000000000LL+I_AC, 0342000000000LL+I_AC, 0343000000000LL+I_AC,
+ 0344000000000LL+I_AC, 0345000000000LL+I_AC, 0346000000000LL+I_AC, 0347000000000LL+I_AC,
+ 0350000000000LL+I_AC, 0351000000000LL+I_AC, 0352000000000LL+I_AC, 0353000000000LL+I_AC,
+ 0354000000000LL+I_AC, 0355000000000LL+I_AC, 0356000000000LL+I_AC, 0357000000000LL+I_AC,
+ 0360000000000LL+I_AC, 0361000000000LL+I_AC, 0362000000000LL+I_AC, 0363000000000LL+I_AC,
+ 0364000000000LL+I_AC, 0365000000000LL+I_AC, 0366000000000LL+I_AC, 0367000000000LL+I_AC,
+ 0370000000000LL+I_AC, 0371000000000LL+I_AC, 0372000000000LL+I_AC, 0373000000000LL+I_AC,
+ 0374000000000LL+I_AC, 0375000000000LL+I_AC, 0376000000000LL+I_AC, 0377000000000LL+I_AC,
+
+ 0400000000000LL+I_AC, 0401000000000LL+I_AC, 0402000000000LL+I_AC, 0403000000000LL+I_AC,
+ 0404000000000LL+I_AC, 0405000000000LL+I_AC, 0406000000000LL+I_AC, 0407000000000LL+I_AC,
+ 0410000000000LL+I_AC, 0411000000000LL+I_AC, 0412000000000LL+I_AC, 0413000000000LL+I_AC,
+ 0414000000000LL+I_AC, 0415000000000LL+I_AC, 0416000000000LL+I_AC, 0417000000000LL+I_AC,
+ 0420000000000LL+I_AC, 0421000000000LL+I_AC, 0422000000000LL+I_AC, 0423000000000LL+I_AC,
+ 0424000000000LL+I_AC, 0425000000000LL+I_AC, 0426000000000LL+I_AC, 0427000000000LL+I_AC,
+ 0430000000000LL+I_AC, 0431000000000LL+I_AC, 0432000000000LL+I_AC, 0433000000000LL+I_AC,
+ 0434000000000LL+I_AC, 0435000000000LL+I_AC, 0436000000000LL+I_AC, 0437000000000LL+I_AC,
+ 0440000000000LL+I_AC, 0441000000000LL+I_AC, 0442000000000LL+I_AC, 0443000000000LL+I_AC,
+ 0444000000000LL+I_AC, 0445000000000LL+I_AC, 0446000000000LL+I_AC, 0447000000000LL+I_AC,
+ 0450000000000LL+I_AC, 0451000000000LL+I_AC, 0452000000000LL+I_AC, 0453000000000LL+I_AC,
+ 0454000000000LL+I_AC, 0455000000000LL+I_AC, 0456000000000LL+I_AC, 0457000000000LL+I_AC,
+ 0460000000000LL+I_AC, 0461000000000LL+I_AC, 0462000000000LL+I_AC, 0463000000000LL+I_AC,
+ 0464000000000LL+I_AC, 0465000000000LL+I_AC, 0466000000000LL+I_AC, 0467000000000LL+I_AC,
+ 0470000000000LL+I_AC, 0471000000000LL+I_AC, 0472000000000LL+I_AC, 0473000000000LL+I_AC,
+ 0474000000000LL+I_AC, 0475000000000LL+I_AC, 0476000000000LL+I_AC, 0477000000000LL+I_AC,
+
+ 0500000000000LL+I_AC, 0501000000000LL+I_AC, 0502000000000LL+I_AC, 0503000000000LL+I_AC,
+ 0504000000000LL+I_AC, 0505000000000LL+I_AC, 0506000000000LL+I_AC, 0507000000000LL+I_AC,
+ 0510000000000LL+I_AC, 0511000000000LL+I_AC, 0512000000000LL+I_AC, 0513000000000LL+I_AC,
+ 0514000000000LL+I_AC, 0515000000000LL+I_AC, 0516000000000LL+I_AC, 0517000000000LL+I_AC,
+ 0520000000000LL+I_AC, 0521000000000LL+I_AC, 0522000000000LL+I_AC, 0523000000000LL+I_AC,
+ 0524000000000LL+I_AC, 0525000000000LL+I_AC, 0526000000000LL+I_AC, 0527000000000LL+I_AC,
+ 0530000000000LL+I_AC, 0531000000000LL+I_AC, 0532000000000LL+I_AC, 0533000000000LL+I_AC,
+ 0534000000000LL+I_AC, 0535000000000LL+I_AC, 0536000000000LL+I_AC, 0537000000000LL+I_AC,
+ 0540000000000LL+I_AC, 0541000000000LL+I_AC, 0542000000000LL+I_AC, 0543000000000LL+I_AC,
+ 0544000000000LL+I_AC, 0545000000000LL+I_AC, 0546000000000LL+I_AC, 0547000000000LL+I_AC,
+ 0550000000000LL+I_AC, 0551000000000LL+I_AC, 0552000000000LL+I_AC, 0553000000000LL+I_AC,
+ 0554000000000LL+I_AC, 0555000000000LL+I_AC, 0556000000000LL+I_AC, 0557000000000LL+I_AC,
+ 0560000000000LL+I_AC, 0561000000000LL+I_AC, 0562000000000LL+I_AC, 0563000000000LL+I_AC,
+ 0564000000000LL+I_AC, 0565000000000LL+I_AC, 0566000000000LL+I_AC, 0567000000000LL+I_AC,
+ 0570000000000LL+I_AC, 0571000000000LL+I_AC, 0572000000000LL+I_AC, 0573000000000LL+I_AC,
+ 0574000000000LL+I_AC, 0575000000000LL+I_AC, 0576000000000LL+I_AC, 0577000000000LL+I_AC,
+
+ 0600000000000LL+I_AC, 0601000000000LL+I_AC, 0602000000000LL+I_AC, 0603000000000LL+I_AC,
+ 0604000000000LL+I_AC, 0605000000000LL+I_AC, 0606000000000LL+I_AC, 0607000000000LL+I_AC,
+ 0610000000000LL+I_AC, 0611000000000LL+I_AC, 0612000000000LL+I_AC, 0613000000000LL+I_AC,
+ 0614000000000LL+I_AC, 0615000000000LL+I_AC, 0616000000000LL+I_AC, 0617000000000LL+I_AC,
+ 0620000000000LL+I_AC, 0621000000000LL+I_AC, 0622000000000LL+I_AC, 0623000000000LL+I_AC,
+ 0624000000000LL+I_AC, 0625000000000LL+I_AC, 0626000000000LL+I_AC, 0627000000000LL+I_AC,
+ 0630000000000LL+I_AC, 0631000000000LL+I_AC, 0632000000000LL+I_AC, 0633000000000LL+I_AC,
+ 0634000000000LL+I_AC, 0635000000000LL+I_AC, 0636000000000LL+I_AC, 0637000000000LL+I_AC,
+ 0640000000000LL+I_AC, 0641000000000LL+I_AC, 0642000000000LL+I_AC, 0643000000000LL+I_AC,
+ 0644000000000LL+I_AC, 0645000000000LL+I_AC, 0646000000000LL+I_AC, 0647000000000LL+I_AC,
+ 0650000000000LL+I_AC, 0651000000000LL+I_AC, 0652000000000LL+I_AC, 0653000000000LL+I_AC,
+ 0654000000000LL+I_AC, 0655000000000LL+I_AC, 0656000000000LL+I_AC, 0657000000000LL+I_AC,
+ 0660000000000LL+I_AC, 0661000000000LL+I_AC, 0662000000000LL+I_AC, 0663000000000LL+I_AC,
+ 0664000000000LL+I_AC, 0665000000000LL+I_AC, 0666000000000LL+I_AC, 0667000000000LL+I_AC,
+ 0670000000000LL+I_AC, 0671000000000LL+I_AC, 0672000000000LL+I_AC, 0673000000000LL+I_AC,
+ 0674000000000LL+I_AC, 0675000000000LL+I_AC, 0676000000000LL+I_AC, 0677000000000LL+I_AC,
+
+ 0704000000000LL+I_AC, 0705000000000LL+I_AC,
+ 0710000000000LL+I_AC, 0711000000000LL+I_AC, 0712000000000LL+I_AC, 0713000000000LL+I_AC,
+ 0714000000000LL+I_AC, 0715000000000LL+I_AC, 0716000000000LL+I_AC, 0717000000000LL+I_AC,
+ 0720000000000LL+I_AC, 0721000000000LL+I_AC, 0722000000000LL+I_AC, 0723000000000LL+I_AC,
+ 0724000000000LL+I_AC, 0725000000000LL+I_AC,
+
+ 0700000000000LL+I_IO, 0700040000000LL+I_IO, 0700100000000LL+I_IO, 0700140000000LL+I_IO,
+ 0700200000000LL+I_IO, 0700240000000LL+I_IO, 0700300000000LL+I_IO, 0700340000000LL+I_IO,
+
+ 0400000000000LL+I_AC, 0401000000000LL+I_AC, 0402000000000LL+I_AC, 0403000000000LL+I_AC,
+ 0434000000000LL+I_AC, 0435000000000LL+I_AC, 0436000000000LL+I_AC, 0437000000000LL+I_AC,
+ 0415000000000LL+I_AC, 0501000000000LL+I_AC,
+ 
+                     0001000000000LL+I_AC, 0002000000000LL+I_AC, 0003000000000LL+I_AC,
+ 0004000000000LL+I_AC, 0005000000000LL+I_AC, 0006000000000LL+I_AC, 0007000000000LL+I_AC,
+ 0010000000000LL+I_AC, 0011000000000LL+I_AC, 0012000000000LL+I_AC, 0013000000000LL+I_AC,
+ 0014000000000LL+I_AC, 0015000000000LL+I_AC, 0016000000000LL+I_AC, 0017000000000LL+I_AC,
+ 0020000000000LL+I_AC, 0021000000000LL+I_AC, 0022000000000LL+I_AC, 0023000000000LL+I_AC,
+ 0024000000000LL+I_AC, 0025000000000LL+I_AC, 0026000000000LL+I_AC, 0027000000000LL+I_AC,
+ 0030000000000LL+I_AC, 0031000000000LL+I_AC,
  -1
  };
 
diff -wruN ../orig-simhv37/PDP10/pdp10_tu.c ./PDP10/pdp10_tu.c
--- ../orig-simhv37/PDP10/pdp10_tu.c	2006-12-29 11:53:16.000000000 +0100
+++ ./PDP10/pdp10_tu.c	2007-02-06 15:34:04.000000000 +0100
@@ -1141,79 +1141,79 @@
 #define BOOT_LEN (sizeof (boot_rom_dec) / sizeof (d10))
 
 static const d10 boot_rom_dec[] = {
-    0515040000003,                          /* boot:hrlzi 1,3       ; uba # */
-    0201000040001,                          /*      movei 0,40001   ; vld,pg 1 */
-    0713001000000+(IOBA_UBMAP+1 & RMASK),   /*      wrio 0,763001(1); set ubmap */
-    0435040000000+(IOBA_TU & RMASK),        /*      iori 1,772440   ; rh addr */
-    0202040000000+FE_RHBASE,                /*      movem 1,FE_RHBASE */
-    0201000000040,                          /*      movei 0,40      ; ctrl reset */
-    0713001000010,                          /*      wrio 0,10(1)    ; ->MTFS */
-    0201100000031,                          /*      movei 2,31      ; space f */
-    0265740377014,                          /*      jsp 17,tpop     ; skip ucode */
-    0201100000071,                          /*      movei 2,71      ; read f */
-    0265740377014,                          /*      jsp 17,tpop     ; read boot */
-    0254000001000,                          /*      jrst 1000       ; start */
-    0200000000000+FE_MTFMT,                 /* tpop:move 0,FE_MTFMT ; den,fmt,slv */
-    0713001000032,                          /*      wrio 0,32(1)    ; ->MTTC */
-    0201000000011,                          /*      movei 0,11      ; clr+go */
-    0713001000000,                          /*      wrio 0,0(1)     ; ->MTCS1 */
-    0201140176000,                          /*      movei 3,176000  ; wd cnt */
-    0201200004000,                          /*      movei 4,4000    ; addr */
-    0200240000000+FE_MTFMT,                 /*      move 5,FE_MTFMT ; unit */
-    0201300000000,                          /*      movei 6,0       ; fmtr */
-    0713141000002,                          /*      wrio 3,2(1)     ; ->MTWC */
-    0713201000004,                          /*      wrio 4,4(1)     ; ->MTBA */
-    0713301000006,                          /*      wrio 6,6(1)     ; ->MTFC */
-    0713301000010,                          /*      wrio 6,10(1)    ; ->MTFS */
-    0713241000032,                          /*      wrio 5,32(1)    ; ->MTTC */
-    0713101000000,                          /*      wrio 2,0(1)     ; ->MTCS1 */
-    0712341000012,                          /*      rdio 7,12(1)    ; read FS */
-    0606340000200,                          /*      trnn 7,200      ; test rdy */
-    0254000377032,                          /*      jrst .-2        ; loop */
-    0606340040000,                          /*      trnn 7,40000    ; test err */
-    0254017000000,                          /*      jrst 0(17)      ; return */
-    0712341000014,                          /*      rdio 7,14(1)    ; read err */
-    0302340001000,                          /*      caie 7,1000     ; fce? */
-    0254200377052,                          /*      halt */
-    0254017000000,                          /*      jrst 0(17)      ; return */
+    0515040000003LL,                          /* boot:hrlzi 1,3       ; uba # */
+    0201000040001LL,                          /*      movei 0,40001   ; vld,pg 1 */
+    0713001000000LL+(IOBA_UBMAP+1 & RMASK),   /*      wrio 0,763001(1); set ubmap */
+    0435040000000LL+(IOBA_TU & RMASK),        /*      iori 1,772440   ; rh addr */
+    0202040000000LL+FE_RHBASE,                /*      movem 1,FE_RHBASE */
+    0201000000040LL,                          /*      movei 0,40      ; ctrl reset */
+    0713001000010LL,                          /*      wrio 0,10(1)    ; ->MTFS */
+    0201100000031LL,                          /*      movei 2,31      ; space f */
+    0265740377014LL,                          /*      jsp 17,tpop     ; skip ucode */
+    0201100000071LL,                          /*      movei 2,71      ; read f */
+    0265740377014LL,                          /*      jsp 17,tpop     ; read boot */
+    0254000001000LL,                          /*      jrst 1000       ; start */
+    0200000000000LL+FE_MTFMT,                 /* tpop:move 0,FE_MTFMT ; den,fmt,slv */
+    0713001000032LL,                          /*      wrio 0,32(1)    ; ->MTTC */
+    0201000000011LL,                          /*      movei 0,11      ; clr+go */
+    0713001000000LL,                          /*      wrio 0,0(1)     ; ->MTCS1 */
+    0201140176000LL,                          /*      movei 3,176000  ; wd cnt */
+    0201200004000LL,                          /*      movei 4,4000    ; addr */
+    0200240000000LL+FE_MTFMT,                 /*      move 5,FE_MTFMT ; unit */
+    0201300000000LL,                          /*      movei 6,0       ; fmtr */
+    0713141000002LL,                          /*      wrio 3,2(1)     ; ->MTWC */
+    0713201000004LL,                          /*      wrio 4,4(1)     ; ->MTBA */
+    0713301000006LL,                          /*      wrio 6,6(1)     ; ->MTFC */
+    0713301000010LL,                          /*      wrio 6,10(1)    ; ->MTFS */
+    0713241000032LL,                          /*      wrio 5,32(1)    ; ->MTTC */
+    0713101000000LL,                          /*      wrio 2,0(1)     ; ->MTCS1 */
+    0712341000012LL,                          /*      rdio 7,12(1)    ; read FS */
+    0606340000200LL,                          /*      trnn 7,200      ; test rdy */
+    0254000377032LL,                          /*      jrst .-2        ; loop */
+    0606340040000LL,                          /*      trnn 7,40000    ; test err */
+    0254017000000LL,                          /*      jrst 0(17)      ; return */
+    0712341000014LL,                          /*      rdio 7,14(1)    ; read err */
+    0302340001000LL,                          /*      caie 7,1000     ; fce? */
+    0254200377052LL,                          /*      halt */
+    0254017000000LL,                          /*      jrst 0(17)      ; return */
     };
 
 static const d10 boot_rom_its[] = {
-    0515040000003,                          /* boot:hrlzi 1,3       ; uba # - not used */
-    0201000040001,                          /*      movei 0,40001   ; vld,pg 1 */
-    0714000000000+(IOBA_UBMAP+1 & RMASK),   /*      iowri 0,763001  ; set ubmap */
-    0435040000000+(IOBA_TU & RMASK),        /*      iori 1,772440   ; rh addr */
-    0202040000000+FE_RHBASE,                /*      movem 1,FE_RHBASE */
-    0201000000040,                          /*      movei 0,40      ; ctrl reset */
-    0714001000010,                          /*      iowri 0,10(1)   ; ->MTFS */
-    0201100000031,                          /*      movei 2,31      ; space f */
-    0265740377014,                          /*      jsp 17,tpop     ; skip ucode */
-    0201100000071,                          /*      movei 2,71      ; read f */
-    0265740377014,                          /*      jsp 17,tpop     ; read boot */
-    0254000001000,                          /*      jrst 1000       ; start */
-    0200000000000+FE_MTFMT,                 /* tpop:move 0,FE_MTFMT ; den,fmt,slv */
-    0714001000032,                          /*      iowri 0,32(1)   ; ->MTTC */
-    0201000000011,                          /*      movei 0,11      ; clr+go */
-    0714001000000,                          /*      iowri 0,0(1)    ; ->MTCS1 */
-    0201140176000,                          /*      movei 3,176000  ; wd cnt */
-    0201200004000,                          /*      movei 4,4000    ; addr */
-    0200240000000+FE_MTFMT,                 /*      move 5,FE_MTFMT ; unit */
-    0201300000000,                          /*      movei 6,0       ; fmtr */
-    0714141000002,                          /*      iowri 3,2(1)    ; ->MTWC */
-    0714201000004,                          /*      iowri 4,4(1)    ; ->MTBA */
-    0714301000006,                          /*      iowri 6,6(1)    ; ->MTFC */
-    0714301000010,                          /*      iowri 6,10(1)   ; ->MTFS */
-    0714241000032,                          /*      iowri 5,32(1)   ; ->MTTC */
-    0714101000000,                          /*      iowri 2,0(1)    ; ->MTCS1 */
-    0710341000012,                          /*      iordi 7,12(1)   ; read FS */
-    0606340000200,                          /*      trnn 7,200      ; test rdy */
-    0254000377032,                          /*      jrst .-2        ; loop */
-    0606340040000,                          /*      trnn 7,40000    ; test err */
-    0254017000000,                          /*      jrst 0(17)      ; return */
-    0710341000014,                          /*      iordi 7,14(1)   ; read err */
-    0302340001000,                          /*      caie 7,1000     ; fce? */
-    0254200377052,                          /*      halt */
-    0254017000000,                          /*      jrst 0(17)      ; return */
+    0515040000003LL,                          /* boot:hrlzi 1,3       ; uba # - not used */
+    0201000040001LL,                          /*      movei 0,40001   ; vld,pg 1 */
+    0714000000000LL+(IOBA_UBMAP+1 & RMASK),   /*      iowri 0,763001  ; set ubmap */
+    0435040000000LL+(IOBA_TU & RMASK),        /*      iori 1,772440   ; rh addr */
+    0202040000000LL+FE_RHBASE,                /*      movem 1,FE_RHBASE */
+    0201000000040LL,                          /*      movei 0,40      ; ctrl reset */
+    0714001000010LL,                          /*      iowri 0,10(1)   ; ->MTFS */
+    0201100000031LL,                          /*      movei 2,31      ; space f */
+    0265740377014LL,                          /*      jsp 17,tpop     ; skip ucode */
+    0201100000071LL,                          /*      movei 2,71      ; read f */
+    0265740377014LL,                          /*      jsp 17,tpop     ; read boot */
+    0254000001000LL,                          /*      jrst 1000       ; start */
+    0200000000000LL+FE_MTFMT,                 /* tpop:move 0,FE_MTFMT ; den,fmt,slv */
+    0714001000032LL,                          /*      iowri 0,32(1)   ; ->MTTC */
+    0201000000011LL,                          /*      movei 0,11      ; clr+go */
+    0714001000000LL,                          /*      iowri 0,0(1)    ; ->MTCS1 */
+    0201140176000LL,                          /*      movei 3,176000  ; wd cnt */
+    0201200004000LL,                          /*      movei 4,4000    ; addr */
+    0200240000000LL+FE_MTFMT,                 /*      move 5,FE_MTFMT ; unit */
+    0201300000000LL,                          /*      movei 6,0       ; fmtr */
+    0714141000002LL,                          /*      iowri 3,2(1)    ; ->MTWC */
+    0714201000004LL,                          /*      iowri 4,4(1)    ; ->MTBA */
+    0714301000006LL,                          /*      iowri 6,6(1)    ; ->MTFC */
+    0714301000010LL,                          /*      iowri 6,10(1)   ; ->MTFS */
+    0714241000032LL,                          /*      iowri 5,32(1)   ; ->MTTC */
+    0714101000000LL,                          /*      iowri 2,0(1)    ; ->MTCS1 */
+    0710341000012LL,                          /*      iordi 7,12(1)   ; read FS */
+    0606340000200LL,                          /*      trnn 7,200      ; test rdy */
+    0254000377032LL,                          /*      jrst .-2        ; loop */
+    0606340040000LL,                          /*      trnn 7,40000    ; test err */
+    0254017000000LL,                          /*      jrst 0(17)      ; return */
+    0710341000014LL,                          /*      iordi 7,14(1)   ; read err */
+    0302340001000LL,                          /*      caie 7,1000     ; fce? */
+    0254200377052LL,                          /*      halt */
+    0254017000000LL,                          /*      jrst 0(17)      ; return */
     };
 
 t_stat tu_boot (int32 unitno, DEVICE *dptr)
diff -wruN ../orig-simhv37/PDP10/pdp10_xtnd.c ./PDP10/pdp10_xtnd.c
--- ../orig-simhv37/PDP10/pdp10_xtnd.c	2005-09-22 15:45:48.000000000 +0200
+++ ./PDP10/pdp10_xtnd.c	2007-02-06 15:34:55.000000000 +0100
@@ -89,10 +89,10 @@
 
 /* Translation control */
 
-#define XT_LFLG         0400000000000                   /* L flag */
-#define XT_SFLG         0400000000000                   /* S flag */
-#define XT_NFLG         0200000000000                   /* N flag */
-#define XT_MFLG         0100000000000                   /* M flag */
+#define XT_LFLG         0400000000000LL                   /* L flag */
+#define XT_SFLG         0400000000000LL                   /* S flag */
+#define XT_NFLG         0200000000000LL                   /* N flag */
+#define XT_MFLG         0100000000000LL                   /* M flag */
 
 /* Translation table */
 
@@ -104,10 +104,10 @@
 
 /* AC masks */
 
-#define XLNTMASK        0000777777777                   /* length */
-#define XFLGMASK        0700000000000                   /* flags */
-#define XT_MBZ          0777000000000                   /* must be zero */
-#define XT_MBZE         0047777000000                   /* must be zero, edit */
+#define XLNTMASK        0000777777777LL                   /* length */
+#define XFLGMASK        0700000000000LL                   /* flags */
+#define XT_MBZ          0777000000000LL                   /* must be zero */
+#define XT_MBZE         0047777000000LL                   /* must be zero, edit */
 
 /* Register change log */
 
@@ -165,19 +165,19 @@
            0,     1000000,
            0,    10000000,
            0,   100000000,
-           0,  1000000000,
-           0, 10000000000,
-           2, 31280523264,
-          29,  3567587328,
-         291,  1316134912,
-        2910, 13161349120,
-       29103, 28534276096,
-      291038, 10464854016,
-     2910383,  1569325056,
-    29103830, 15693250560,
-   291038304, 19493552128,
-  2910383045, 23136829440,
- 29103830456, 25209864192
+           0,  1000000000LL,
+           0, 10000000000LL,
+           2, 31280523264LL,
+          29,  3567587328LL,
+         291,  1316134912LL,
+        2910, 13161349120LL,
+       29103, 28534276096LL,
+      291038, 10464854016LL,
+     2910383,  1569325056LL,
+    29103830, 15693250560LL,
+   291038304, 19493552128LL,
+  2910383045, 23136829440LL,
+ 29103830456, 25209864192LL
  };
 
 int xtend (int32 ac, int32 ea, int32 pflgs)
diff -wruN ../orig-simhv37/PDP8/pdp8_ct.c ./PDP8/pdp8_ct.c
--- ../orig-simhv37/PDP8/pdp8_ct.c	2006-12-19 16:08:30.000000000 +0100
+++ ./PDP8/pdp8_ct.c	2007-02-06 16:10:08.000000000 +0100
@@ -461,7 +461,7 @@
 if (uptr == NULL) {                                     /* unit specified? */
     uptr = ct_busy ();                                  /* use busy unit */
     if ((uptr == NULL) && (ct_sra & SRA_ENAB))          /* none busy? */
-        uptr = uptr = ct_dev.units + GET_UNIT (ct_sra); /* use sel unit */
+        uptr = ct_dev.units + GET_UNIT (ct_sra); /* use sel unit */
     }
 else if (ct_srb & SRB_EOF) uptr->UST |= UST_GAP;        /* save gap */
 if (uptr) {                                             /* any unit? */
diff -wruN ../orig-simhv37/scp.c ./scp.c
--- ../orig-simhv37/scp.c	2007-01-30 10:54:12.000000000 +0100
+++ ./scp.c	2007-02-06 15:35:46.000000000 +0100
@@ -455,16 +455,16 @@
     0x1FFFFFF, 0x3FFFFFF, 0x7FFFFFF, 0xFFFFFFF,
     0x1FFFFFFF, 0x3FFFFFFF, 0x7FFFFFFF, 0xFFFFFFFF
 #if defined (USE_INT64)
-    , 0x1FFFFFFFF, 0x3FFFFFFFF, 0x7FFFFFFFF, 0xFFFFFFFFF,
-    0x1FFFFFFFFF, 0x3FFFFFFFFF, 0x7FFFFFFFFF, 0xFFFFFFFFFF,
-    0x1FFFFFFFFFF, 0x3FFFFFFFFFF, 0x7FFFFFFFFFF, 0xFFFFFFFFFFF,
-    0x1FFFFFFFFFFF, 0x3FFFFFFFFFFF, 0x7FFFFFFFFFFF, 0xFFFFFFFFFFFF,
-    0x1FFFFFFFFFFFF, 0x3FFFFFFFFFFFF, 0x7FFFFFFFFFFFF, 0xFFFFFFFFFFFFF,
-    0x1FFFFFFFFFFFFF, 0x3FFFFFFFFFFFFF, 0x7FFFFFFFFFFFFF, 0xFFFFFFFFFFFFFF,
-    0x1FFFFFFFFFFFFFF, 0x3FFFFFFFFFFFFFF,
-    0x7FFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFF,
-    0x1FFFFFFFFFFFFFFF, 0x3FFFFFFFFFFFFFFF,
-    0x7FFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF
+    , 0x1FFFFFFFFLL, 0x3FFFFFFFFLL, 0x7FFFFFFFFLL, 0xFFFFFFFFFLL,
+    0x1FFFFFFFFFLL, 0x3FFFFFFFFFLL, 0x7FFFFFFFFFLL, 0xFFFFFFFFFFLL,
+    0x1FFFFFFFFFFLL, 0x3FFFFFFFFFFLL, 0x7FFFFFFFFFFLL, 0xFFFFFFFFFFFLL,
+    0x1FFFFFFFFFFFLL, 0x3FFFFFFFFFFFLL, 0x7FFFFFFFFFFFLL, 0xFFFFFFFFFFFFLL,
+    0x1FFFFFFFFFFFFLL, 0x3FFFFFFFFFFFFLL, 0x7FFFFFFFFFFFFLL, 0xFFFFFFFFFFFFFLL,
+    0x1FFFFFFFFFFFFFLL, 0x3FFFFFFFFFFFFFLL, 0x7FFFFFFFFFFFFFLL, 0xFFFFFFFFFFFFFFLL,
+    0x1FFFFFFFFFFFFFFLL, 0x3FFFFFFFFFFFFFFLL,
+    0x7FFFFFFFFFFFFFFLL, 0xFFFFFFFFFFFFFFFLL,
+    0x1FFFFFFFFFFFFFFFLL, 0x3FFFFFFFFFFFFFFFLL,
+    0x7FFFFFFFFFFFFFFFLL, 0xFFFFFFFFFFFFFFFFLL
 #endif
     };
 
diff -wruN ../orig-simhv37/VAX/vax_fpa.c ./VAX/vax_fpa.c
--- ../orig-simhv37/VAX/vax_fpa.c	2006-05-18 17:03:50.000000000 +0200
+++ ./VAX/vax_fpa.c	2007-02-06 15:51:52.000000000 +0100
@@ -68,8 +68,8 @@
 #define FD_FRACL        (FD_FRACW | 0xFFFF0000)         /* f/d fraction */
 #define G_FRACW         (0xFFFF & ~(G_EXP | FPSIGN))
 #define G_FRACL         (G_FRACW | 0xFFFF0000)          /* g fraction */
-#define UNSCRAM(h,l)    (((((t_uint64) (h)) << 48) & 0xFFFF000000000000) | \
-                        ((((t_uint64) (h)) << 16) & 0x0000FFFF00000000) | \
+#define UNSCRAM(h,l)    (((((t_uint64) (h)) << 48) & 0xFFFF000000000000LL) | \
+                        ((((t_uint64) (h)) << 16) & 0x0000FFFF00000000LL) | \
                         ((((t_uint64) (l)) << 16) & 0x00000000FFFF0000) | \
                         ((((t_uint64) (l)) >> 16) & 0x000000000000FFFF))
 #define CONCAT(h,l)     ((((t_uint64) (h)) << 32) | ((uint32) (l)))
@@ -80,7 +80,7 @@
     t_uint64            frac;
     } UFP;
 
-#define UF_NM           0x8000000000000000              /* normalized */
+#define UF_NM           0x8000000000000000LL              /* normalized */
 #define UF_FRND         0x0000008000000000              /* F round */
 #define UF_DRND         0x0000000000000080              /* D round */
 #define UF_GRND         0x0000000000000400              /* G round */
@@ -511,8 +511,8 @@
 {
 int32 i;
 static t_uint64 normmask[5] = {
- 0xc000000000000000, 0xf000000000000000, 0xff00000000000000,
- 0xffff000000000000, 0xffffffff00000000
+ 0xc000000000000000LL, 0xf000000000000000LL, 0xff00000000000000LL,
+ 0xffff000000000000LL, 0xffffffff00000000LL
  };
 static int32 normtab[6] = { 1, 2, 4, 8, 16, 32};

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File simhv37.dif of Package simh (Revision 509a73bc3bfaeed5e46a77a84de3ce6d)

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