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llvm18
riscv.patch
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File riscv.patch of Package llvm18
From 0fc1d0e57123f6bec8d1248e800754e34ea1023f Mon Sep 17 00:00:00 2001 From: Jonas Hahnfeld <hahnjo@hahnjo.de> Date: Mon, 12 Feb 2024 19:45:52 +0100 Subject: [PATCH] [JITLink][RISCV] Use hashmap to find PCREL_HI20 edge (#78849) As noted in issues #68594 and #73935, `JITLink/RISCV/ELF_ehframe.s` fails with libstdc++'s expensive checks because `getRISCVPCRelHi20` calls `std::equal_range` on the edges which may not be ordered by their offset. Instead let `ELFJITLinker_riscv` build a hashmap of all edges with type `R_RISCV_PCREL_HI20` that can be looked up in constant time. Closes #73935 --- .../lib/ExecutionEngine/JITLink/ELF_riscv.cpp | 68 ++++++++++--------- 1 file changed, 35 insertions(+), 33 deletions(-) diff --git a/llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp b/llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp index d0701ba08bd9..627f186ca591 100644 --- a/llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp +++ b/llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp @@ -133,38 +133,6 @@ const uint8_t namespace llvm { namespace jitlink { -static Expected<const Edge &> getRISCVPCRelHi20(const Edge &E) { - using namespace riscv; - assert((E.getKind() == R_RISCV_PCREL_LO12_I || - E.getKind() == R_RISCV_PCREL_LO12_S) && - "Can only have high relocation for R_RISCV_PCREL_LO12_I or " - "R_RISCV_PCREL_LO12_S"); - - const Symbol &Sym = E.getTarget(); - const Block &B = Sym.getBlock(); - orc::ExecutorAddrDiff Offset = Sym.getOffset(); - - struct Comp { - bool operator()(const Edge &Lhs, orc::ExecutorAddrDiff Offset) { - return Lhs.getOffset() < Offset; - } - bool operator()(orc::ExecutorAddrDiff Offset, const Edge &Rhs) { - return Offset < Rhs.getOffset(); - } - }; - - auto Bound = - std::equal_range(B.edges().begin(), B.edges().end(), Offset, Comp{}); - - for (auto It = Bound.first; It != Bound.second; ++It) { - if (It->getKind() == R_RISCV_PCREL_HI20) - return *It; - } - - return make_error<JITLinkError>( - "No HI20 PCREL relocation type be found for LO12 PCREL relocation type"); -} - static uint32_t extractBits(uint32_t Num, unsigned Low, unsigned Size) { return (Num & (((1ULL << Size) - 1) << Low)) >> Low; } @@ -184,9 +152,43 @@ class ELFJITLinker_riscv : public JITLinker<ELFJITLinker_riscv> { public: ELFJITLinker_riscv(std::unique_ptr<JITLinkContext> Ctx, std::unique_ptr<LinkGraph> G, PassConfiguration PassConfig) - : JITLinker(std::move(Ctx), std::move(G), std::move(PassConfig)) {} + : JITLinker(std::move(Ctx), std::move(G), std::move(PassConfig)) { + JITLinkerBase::getPassConfig().PostAllocationPasses.push_back( + [this](LinkGraph &G) { return gatherRISCVPCRelHi20(G); }); + } private: + DenseMap<std::pair<const Block *, orc::ExecutorAddrDiff>, const Edge *> + RelHi20; + + Error gatherRISCVPCRelHi20(LinkGraph &G) { + for (Block *B : G.blocks()) + for (Edge &E : B->edges()) + if (E.getKind() == R_RISCV_PCREL_HI20) + RelHi20[{B, E.getOffset()}] = &E; + + return Error::success(); + } + + Expected<const Edge &> getRISCVPCRelHi20(const Edge &E) const { + using namespace riscv; + assert((E.getKind() == R_RISCV_PCREL_LO12_I || + E.getKind() == R_RISCV_PCREL_LO12_S) && + "Can only have high relocation for R_RISCV_PCREL_LO12_I or " + "R_RISCV_PCREL_LO12_S"); + + const Symbol &Sym = E.getTarget(); + const Block &B = Sym.getBlock(); + orc::ExecutorAddrDiff Offset = Sym.getOffset(); + + auto It = RelHi20.find({&B, Offset}); + if (It != RelHi20.end()) + return *It->second; + + return make_error<JITLinkError>("No HI20 PCREL relocation type be found " + "for LO12 PCREL relocation type"); + } + Error applyFixup(LinkGraph &G, Block &B, const Edge &E) const { using namespace riscv; using namespace llvm::support; -- 2.45.2
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