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xen
5592a116-nested-EPT-fix-the-handling-of-nested-...
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File 5592a116-nested-EPT-fix-the-handling-of-nested-EPT.patch of Package xen
# Commit 71bb7304e7a7a35ea6df4b0cedebc35028e4c159 # Date 2015-06-30 15:00:54 +0100 # Author Liang Li <liang.z.li@intel.com> # Committer Ian Campbell <ian.campbell@citrix.com> nested EPT: fix the handling of nested EPT If the host EPT entry is changed, the nested EPT should be updated. the current code does not do this, and it's wrong. I have tested this patch, the L2 guest can boot and run as normal. Signed-off-by: Liang Li <liang.z.li@intel.com> Signed-off-by: Yang Zhang <yang.z.zhang@intel.com> Reported-by: Tim Deegan <tim@xen.org> Reviewed-by: Tim Deegan <tim@xen.org> --- a/xen/arch/x86/mm/p2m-ept.c +++ b/xen/arch/x86/mm/p2m-ept.c @@ -26,6 +26,7 @@ #include <asm/p2m.h> #include <asm/hvm/vmx/vmx.h> #include <asm/hvm/vmx/vmcs.h> +#include <asm/hvm/nestedhvm.h> #include <xen/iommu.h> #include <asm/mtrr.h> #include <asm/hvm/cacheattr.h> @@ -1040,6 +1041,9 @@ void ept_sync_domain(struct p2m_domain * ASSERT(local_irq_is_enabled()); + if ( nestedhvm_enabled(d) && !p2m_is_nestedp2m(p2m) ) + p2m_flush_nestedp2m(d); + /* * Flush active cpus synchronously. Flush others the next time this domain * is scheduled onto them. We accept the race of other CPUs adding to --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -1713,6 +1713,12 @@ p2m_flush_table(struct p2m_domain *p2m) ASSERT(page_list_empty(&p2m->pod.super)); ASSERT(page_list_empty(&p2m->pod.single)); + if ( p2m->np2m_base == P2M_BASE_EADDR ) + { + p2m_unlock(p2m); + return; + } + /* This is no longer a valid nested p2m for any address space */ p2m->np2m_base = P2M_BASE_EADDR;
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