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openSUSE:Step:15-SP2
xen.33138
xsa456-3.patch
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File xsa456-3.patch of Package xen.33138
# Commit c94e2105924347de0d9f32065370e802a20cc829 # Date 2024-04-09 16:37:30 +0100 # Author Andrew Cooper <andrew.cooper3@citrix.com> # Committer Andrew Cooper <andrew.cooper3@citrix.com> x86/tsx: Expose RTM_ALWAYS_ABORT to guests A TSX Abort is one option mitigate Native-BHI, but a guest kernel doesn't get to see this if Xen has turned RTM off using MSR_TSX_{CTRL,FORCE_ABORT}. Therefore, the meaning of RTM_ALWAYS_ABORT has been adjusted to "XBEGIN won't fault", and it should be exposed to guests so they can make a better decision. Expose it in the max policy for any RTM-capable system. Offer it by default only if RTM has been disabled. Update test-tsx to account for this new meaning. While adjusting the logic in test_guest_policies(), take the opportunity to use feature names (now they're available) to make the logic easier to follow. This is part of XSA-456 / CVE-2024-2201. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -430,6 +430,21 @@ static void __init guest_common_feature_ __set_bit(X86_FEATURE_FB_CLEAR, fs); __set_bit(X86_FEATURE_RFDS_CLEAR, fs); } + + /* + * To mitigate Native-BHI, one option is to use a TSX Abort on capable + * systems. This is safe even if RTM has been disabled for other reasons + * via MSR_TSX_{CTRL,FORCE_ABORT}. However, a guest kernel doesn't get to + * know this type of information. + * + * Therefore the meaning of RTM_ALWAYS_ABORT has been adjusted, to instead + * mean "XBEGIN won't fault". This is enough for a guest kernel to make + * an informed choice WRT mitigating Native-BHI. + * + * If RTM-capable, we can run a VM which has seen RTM_ALWAYS_ABORT. + */ + if ( test_bit(X86_FEATURE_RTM, fs) ) + __set_bit(X86_FEATURE_RTM_ALWAYS_ABORT, fs); } static void __init calculate_pv_max_policy(void) --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -266,7 +266,7 @@ XEN_CPUFEATURE(AVX512_4VNNIW, 9*32+ 2) / XEN_CPUFEATURE(AVX512_4FMAPS, 9*32+ 3) /*A AVX512 Multiply Accumulation Single Precision */ XEN_CPUFEATURE(SRBDS_CTRL, 9*32+ 9) /* MSR_MCU_OPT_CTRL and RNGDS_MITG_DIS. */ XEN_CPUFEATURE(MD_CLEAR, 9*32+10) /*!A VERW clears microarchitectural buffers */ -XEN_CPUFEATURE(RTM_ALWAYS_ABORT, 9*32+11) /* RTM disabled (but XBEGIN wont fault) */ +XEN_CPUFEATURE(RTM_ALWAYS_ABORT, 9*32+11) /*! RTM disabled (but XBEGIN wont fault) */ XEN_CPUFEATURE(TSX_FORCE_ABORT, 9*32+13) /* MSR_TSX_FORCE_ABORT.RTM_ABORT */ XEN_CPUFEATURE(HYBRID, 9*32+15) /* Heterogeneous platform */ XEN_CPUFEATURE(CET_IBT, 9*32+20) /* CET - Indirect Branch Tracking */
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