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xen.11173
5c8fc6c0-x86-MSR-shorten-ARCH_CAPABILITIES.patch
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File 5c8fc6c0-x86-MSR-shorten-ARCH_CAPABILITIES.patch of Package xen.11173
# Commit ba27aaa88548c824a47dcf5609288ee1c05d2946 # Date 2019-03-18 16:26:40 +0000 # Author Andrew Cooper <andrew.cooper3@citrix.com> # Committer Andrew Cooper <andrew.cooper3@citrix.com> x86/msr: Shorten ARCH_CAPABILITIES_* constants They are unnecesserily verbose, and ARCH_CAPS_* is already the more common version. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -270,8 +270,8 @@ static void __init print_details(enum in (_7d0 & cpufeat_mask(X86_FEATURE_L1D_FLUSH)) ? " L1D_FLUSH" : "", (_7d0 & cpufeat_mask(X86_FEATURE_SSBD)) ? " SSBD" : "", (e8b & cpufeat_mask(X86_FEATURE_IBPB)) ? " IBPB" : "", - (caps & ARCH_CAPABILITIES_IBRS_ALL) ? " IBRS_ALL" : "", - (caps & ARCH_CAPABILITIES_RDCL_NO) ? " RDCL_NO" : "", + (caps & ARCH_CAPS_IBRS_ALL) ? " IBRS_ALL" : "", + (caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "", (caps & ARCH_CAPS_RSBA) ? " RSBA" : "", (caps & ARCH_CAPS_SKIP_L1DFL) ? " SKIP_L1DFL": "", (caps & ARCH_CAPS_SSB_NO) ? " SSB_NO" : ""); @@ -582,7 +582,7 @@ static __init void l1tf_calculations(uin } /* Any processor advertising RDCL_NO should be not vulnerable to L1TF. */ - if ( caps & ARCH_CAPABILITIES_RDCL_NO ) + if ( caps & ARCH_CAPS_RDCL_NO ) cpu_has_bug_l1tf = false; if ( cpu_has_bug_l1tf && hit_default ) @@ -646,9 +646,9 @@ int8_t __read_mostly opt_xpti_domu = -1; static __init void xpti_init_default(uint64_t caps) { if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) - caps = ARCH_CAPABILITIES_RDCL_NO; + caps = ARCH_CAPS_RDCL_NO; - if ( caps & ARCH_CAPABILITIES_RDCL_NO ) + if ( caps & ARCH_CAPS_RDCL_NO ) { if ( opt_xpti_hwdom < 0 ) opt_xpti_hwdom = 0; --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -44,8 +44,8 @@ #define PRED_CMD_IBPB (_AC(1, ULL) << 0) #define MSR_ARCH_CAPABILITIES 0x0000010a -#define ARCH_CAPABILITIES_RDCL_NO (_AC(1, ULL) << 0) -#define ARCH_CAPABILITIES_IBRS_ALL (_AC(1, ULL) << 1) +#define ARCH_CAPS_RDCL_NO (_AC(1, ULL) << 0) +#define ARCH_CAPS_IBRS_ALL (_AC(1, ULL) << 1) #define ARCH_CAPS_RSBA (_AC(1, ULL) << 2) #define ARCH_CAPS_SKIP_L1DFL (_AC(1, ULL) << 3) #define ARCH_CAPS_SSB_NO (_AC(1, ULL) << 4)
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