Revisions of libcpuid
Dominique Leuenberger (dimstar_suse)
accepted
request 1082737
from
Martin Pluskal (pluskalm)
(revision 14)
- Update to version 0.6.3: * Support for Intel Pentium and Celeron for Alder Lake-S * Support for Intel Alder Lake-HX * Support for Intel Alder Lake-X * Fix detection of Intel Alder Lake-P * Fix infinite loop in set_cpu_affinity() on macOS * Fix a misprint of extended CPUID in cpuid_basic_identify() * Restore previous thread CPU affinity before returning from cpuid_get_all_raw_data() (#184) * Query CPU info at least once even if set_cpu_affinity() fails * Support for AMD 19h family MSRs * Fix detection of Intel Core i5 Lynnfield * Rename set_error() to cpuid_set_error() and get_error() to cpuid_get_error() (#188) * Support for Intel Alder Lake-N * Support for AMD Rembrandt with Radeon Graphics * Support for Intel Raptor Lake-S with "Golden Cove" cores * Support for Intel Raptor Lake-P * Support for Intel Raptor Lake-U * Support for Intel Rocket Lake-E
Dominique Leuenberger (dimstar_suse)
accepted
request 1040606
from
Martin Pluskal (pluskalm)
(revision 13)
Dominique Leuenberger (dimstar_suse)
accepted
request 1010188
from
Martin Pluskal (pluskalm)
(revision 12)
- Add missing dependency - update to 0.6.0: * Support for AMD Rembrandt * Support for AMD Warhol * Remove Debian package from source tree (#165) * Fix build under Clang 15 (#167) * Support for AMD Athlon Godavari * Support for hybrid CPU like Intel Alder Lake (#166) * Detect presence of hypervisor (#169) * Decode deterministic cache info for AMD CPUs (#168) * Add cache instances field in cpu_id_t and system_id_t (#168) * Support AMD Bald Eagle * Support for more AMD Godavari (Athlon) * Rename AMD Bulldozer to Zambezi * Support for AMD Interlagos * Support for AMD Abu Dhabi * Support for AMD Beema * Support for AMD Steppe Eagle * Support for more AMD Kabini (Sempron + Athlon) * Improve msr_serialize_raw_data() * Support for AMD Zen 2 custom APU for Steam Deck
Dominique Leuenberger (dimstar_suse)
accepted
request 952939
from
Martin Pluskal (pluskalm)
(revision 11)
- Update to version 0.5.1+git.1644144775: * Tests: add more Zen2 tests from InstLatx64 * DB: add Lucienne * Report memory allocation failures without segfaulting. (#160) * Don't link with msrdriver.c on non-Windows platform. (#159)
Dominique Leuenberger (dimstar_suse)
accepted
request 914539
from
Martin Pluskal (pluskalm)
(revision 10)
- Update to version 0.5.1+git.1626502835: * CMake: reduce min cmake requirement 3.14 -> 3.13 * Fix failing CI builds introduced by cb5fdd1 * Use popcount64 from libc when available (#152) * allow to build either static or shared (#156) * cmake: allow libcpuid to be added as a CMake subproject (#155) * fix installation of BUNDLE if iOS (#154) * cmake: add an option to build tests (#153) * Fix #150: CPU Family/Model is used as Ext.Family/Model * DB: add Tiger Lake
Richard Brown (RBrownSUSE)
accepted
request 882705
from
Factory Maintainer (factory-maintainer)
(revision 9)
Automatic submission by obs-autosubmit
Dominique Leuenberger (dimstar_suse)
accepted
request 850394
from
Martin Pluskal (pluskalm)
(revision 8)
- Update to version 0.5.0+git.20201114: * Tests: fix path for cpuid_tool When we use CMake, the 'cpuid_tool' binary is in the 'build' directory * DB: add Vermeer https://en.wikichip.org/wiki/amd/cores/vermeer Test file converted from http://users.atw.hu/instlatx64/AuthenticAMD/AuthenticAMD0A20F10_K19_Vermeer_CPUID1.txt * DB: add Gemini Lake https://en.wikichip.org/wiki/intel/cores/gemini_lake Reported in X0rg/CPU-X#164 * DB: add Comet Lake-U https://en.wikipedia.org/wiki/Comet_Lake_(microprocessor)#U-series_(Medium_power) Reported in X0rg/CPU-X#162 * DB: add Kaby Lake-G https://en.wikichip.org/wiki/intel/cores/kaby_lake_g Test file converted from http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00906E9_KabylakeG_CPUID.txt * DB: add Kaby Lake Refresh https://en.wikichip.org/wiki/intel/cores/kaby_lake_r Core i5 8250U was detected as Coffee Lake wrongly. Reported in X0rg/CPU-X#161
Dominique Leuenberger (dimstar_suse)
accepted
request 846147
from
Martin Pluskal (pluskalm)
(revision 7)
- Update to version 0.5.0+git.20201019: * Fixes issue #148: CMake build script not in 0.5.0 tarball release
Dominique Leuenberger (dimstar_suse)
accepted
request 826264
from
Martin Pluskal (pluskalm)
(revision 6)
- Update to version 0.5.0+git.20200528: * Related to c2645d0. Convert all python scripts to Python 3. * Add Downloads section on Readme.md Close #140 * Add I-Nex to the users list
Yuchen Lin (maxlin_factory)
accepted
request 809020
from
Martin Pluskal (pluskalm)
(revision 5)
- Update to version v0.5.0+git.20200526: * CI: remove 'v' prefix in assets * CI: checkout sources before making release * Release version 0.5.0 (#146) * Add GitHub workflows for CI/CD - CI: it will check code consistency and run tests for all events (except for tags) - CD: it will build all assets and create a draft Close #122 * check-consistency: return error count * Fix code consistency Result before this patch: * CMake: fix include directory * CMake: fix build on Windows * CMake: fix install target's export * tests: fix unused-result warning in convert_instlatx64 tool * Update .gitignore * CMake: fix Unix install and format * Add config file for cmake-format It formats CMakeLists.txt files See https://github.com/cheshirekow/cmake_format * Doxygen: upgrade Doxyfile to avoid warnings warning: Tag 'PERL_PATH' at line 1032 of file '/libcpuid/build/libcpuid/Doxyfile' has become obsolete. To avoid this warning please remove this line from your configuration file or upgrade it using "doxygen -u" warning: argument 'a4wide' for option PAPER_TYPE is not a valid enum value Using the default: a4! * Doxygen: turn on quiet mode It is too noisy with CMake * Detect AVX512VBMI and AVX512VBMI2 features on Intel CPUs More information: https://en.wikichip.org/wiki/x86/avx-512 Resolve #134 * Detect ABM feature on Intel CPUs Resolve #144 * Detect RDSEED/ADX/SHA_NI features on AMD CPUs These x86 instruction set extensions are present since Zen micro-architecture Resolve #145 * Update cpuid_main.c * DB: add Ivy Bridge-E (Xeon) * Tests: update all tests to add fields for L1I * Tests: update to add L1I information Related to 25d0614811991c855ce7db0d898dbc6200dfa840 Dump of Core i5 520m from CPU-X#119 * Add L1 Instruction Cache information Some CPUs does not have the same associativity for L1D and L1I, as reported in X0rg/CPU-X#119 It adds l1_instruction_assoc and l1_instruction_cacheline in cpu_id_t To avoid confusing, also adds l1_data_assoc and l1_data_cacheline l1_assoc and l1_cacheline are leave untouched for backward compatibility * Ignore .vscode directory Yes, 0b05f45e03b0aa39a65eba9451b59c9381e8474c was about VS Code * Tests: add amd_fn8000001dh subleaf See e562798cecf4af852fdfef4b0e7bf159a5d9b4de * Tests: parse subleafs in convert_instlatx64 Also, it adds 0xffffffff when data is not available, so all lines are presents * Re-fix L3 cache associativity detection on AMD Zen 2 CPUs Previous commit: 848394ee460c70298f91569d33f2c156bddb0f6c * Applied a patch from @tavplubix * Use constant for registers name It helps when reading technical documentation and it avoids 'magic values'
Dominique Leuenberger (dimstar_suse)
accepted
request 766548
from
Martin Pluskal (pluskalm)
(revision 4)
- Update to version 0.4.1+git.20200102: * DB: Add Threadripper (Castle Peak) * Fix compilation on non-x86/ARM architectures. * Add support for get_total_cpus on Haiku. * Some typo fixes in human readable text. * Add Xeon CLX (Cascade lake-based) using data from PR #129 * add support to feature intel avx512_vnni * AARCH64 stub * Ignore convert_instlatx64 binary * add Hygon Dhyana C86 7seris test file * Add Hygon Dhyana detect support - Switch to _service
Dominique Leuenberger (dimstar_suse)
accepted
request 676929
from
Martin Pluskal (pluskalm)
(revision 3)
Dominique Leuenberger (dimstar_suse)
accepted
request 502377
from
Martin Pluskal (pluskalm)
(revision 2)
- Enable internal tests
Dominique Leuenberger (dimstar_suse)
accepted
request 442683
from
Martin Pluskal (pluskalm)
(revision 1)
new package
Displaying all 17 revisions