Icarus Verilog

Edit Package iverilog

Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.

Refresh
Refresh
Source Files
Filename Size Changed
iverilog.changes 0000003761 3.67 KB
iverilog.spec 0000002241 2.19 KB
verilog-10.1.tar.gz 0001685176 1.61 MB
Latest Revision
Yuchen Lin's avatar Yuchen Lin (maxlin_factory) committed (revision 2)
branch from SP4 Backports
Comments 0
openSUSE Build Service is sponsored by