Overview

Request 723008 accepted

- Update to version 19.07.00:
* cpu/msr: add 3 more CPU IDs for IA32_silvermont_MSRs
* cpu/msr: check SGX & LMCE in IA32_FEATURE_CONTROL (3ah)
* cpu/msr: move TSC_ADJUST (3bh) to IA32_MSRs
* cpu/msr: add SMM_MONITOR_CTL (9bh) to IA32_MSRs
* cpu/msr: add MC*_CTL2 MSR registers
* cpu/msr: add VMX_VMFUNC MSR register
* cpu/msr: add MISC_ENABLE MSR to IA32_atom_MSRs
* cpu/msr: add MSR_PMG_IO_CAPTURE_BASE to IA32_silvermont_MSRs
* cpu/msr: add MSR_FEATURE_CONFIG to IA32_silvermont_MSRs
* cpu/msr: add MSR_TEMPERATURE_TARGET to IA32_silvermont_MSRs
* cpu/msr: add MSR_BBL_CR_CTL3 to IA32_silvermont_MSRs
* ACPICA: Update to version 20190703

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Request History
Martin Pluskal's avatar

pluskalm created request

- Update to version 19.07.00:
* cpu/msr: add 3 more CPU IDs for IA32_silvermont_MSRs
* cpu/msr: check SGX & LMCE in IA32_FEATURE_CONTROL (3ah)
* cpu/msr: move TSC_ADJUST (3bh) to IA32_MSRs
* cpu/msr: add SMM_MONITOR_CTL (9bh) to IA32_MSRs
* cpu/msr: add MC*_CTL2 MSR registers
* cpu/msr: add VMX_VMFUNC MSR register
* cpu/msr: add MISC_ENABLE MSR to IA32_atom_MSRs
* cpu/msr: add MSR_PMG_IO_CAPTURE_BASE to IA32_silvermont_MSRs
* cpu/msr: add MSR_FEATURE_CONFIG to IA32_silvermont_MSRs
* cpu/msr: add MSR_TEMPERATURE_TARGET to IA32_silvermont_MSRs
* cpu/msr: add MSR_BBL_CR_CTL3 to IA32_silvermont_MSRs
* ACPICA: Update to version 20190703


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licensedigger accepted review

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staging-bot accepted review

ready to accept


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staging-bot approved review

ready to accept


Dominique Leuenberger's avatar

dimstar_suse accepted request

Accept to openSUSE:Factory

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